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SH7708 データシート(PDF) 225 Page - Renesas Technology Corp |
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SH7708 データシート(HTML) 225 Page - Renesas Technology Corp |
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225 / 633 page ![]() 207 Bits 12 to 10—Area 5 Wait Control (A5W2, A5W1, A5W0): These bits specify the number of wait states inserted in physical space area 5. They also specify the burst pitch for burst transfer. Description First Cycle Burst Cycle (Excluding First Cycle) Bit 12: A5W2 Bit 11: A5W1 Bit 10: A5W0 Inserted Wait States WAIT Pin Number of States Per Data Transfer WAIT Pin 0 0 0 0 Ignored 2 Enabled 1 1 Enabled 2 Enabled 1 0 2 Enabled 3 Enabled 1 3 Enabled 4 Enabled 1 0 0 4 Enabled 4 Enabled 1 6 Enabled 6 Enabled 1 0 8 Enabled 8 Enabled 1 10 (Initial value) Enabled 10 Enabled Bits 9 to 7—Area 4 Wait Control (A4W2, A4W1, A4W0): These bits specify the number of wait states inserted in physical space area 4. Description Bit 9: A4W2 Bit 8: A4W1 Bit 7: A4W0 Inserted Wait States WAIT Pin 0000 Ignored 1 1 Enabled 1 0 2 Enabled 1 3 Enabled 1004 Enabled 1 6 Enabled 1 0 8 Enabled 1 10 Enabled (Initial value) |
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