データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

CS47048 データシート(PDF) 8 Page - Cirrus Logic

部品番号 CS47048
部品情報  Audio SOC Processor Family
PDF  34 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  CIRRUS [Cirrus Logic]
ホームページ  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS47048 データシート(HTML) 8 Page - Cirrus Logic

Back Button CS47048 Datasheet HTML 4Page - Cirrus Logic CS47048 Datasheet HTML 5Page - Cirrus Logic CS47048 Datasheet HTML 6Page - Cirrus Logic CS47048 Datasheet HTML 7Page - Cirrus Logic CS47048 Datasheet HTML 8Page - Cirrus Logic CS47048 Datasheet HTML 9Page - Cirrus Logic CS47048 Datasheet HTML 10Page - Cirrus Logic CS47048 Datasheet HTML 11Page - Cirrus Logic CS47048 Datasheet HTML 12Page - Cirrus Logic Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 34 page
background image
CS47048 Data Sheet
Audio SOC Processor Family
8
Copyright 2008 Cirrus Logic
DS787A7
4. Hardware Functional Description
The CS47048 is a true system-on-a-chip that combines a powerful 32-bit DSP engine with
analog/digital audio inputs and analog/digital audio outputs. It can be integrated into a complex
multi-DSP processing system, or stand alone in an audio product that requires analog-in and
analog-out. A top level block diagram is shown below in Figure 1.
Figure 1. CS47048 Top-Level Block Diagram
4.1 DSP Core
The CS47048 is a single-core DSP with separate X and Y data and P code memory spaces. The
DSP core is a high-performance, 32-bit, user-programmable, fixed-point DSP that is capable of
performing two multiply-and-accumulate (MAC) operations per clock cycle. The DSP core has
eight 72-bit accumulators, four X-data and four Y-data registers, and 12 index registers.
The DSP core is coupled to a flexible 8-channel DMA engine. The DMA engine can move data
between peripherals such as the serial control port (SCP), digital audio input (DAI) and digital audio
output (DAO), sample rate converters (SRC), analog-to-digital converters (ADC), digital-to-analog
converters (DAC), or any DSP core memory, all without the intervention of the DSP. The DMA
engine off-loads data move instructions from the DSP core, leaving more MIPS available for signal
processing instructions.
x8
x4
x2
x2
DAC0
text
Coyote32
32-bit DSP
DMA
SPI / I
2C
Control
I
2S /
TDM
ADC0/1
I
2S / TDM
I
2S / TDM /
SPDIF
PLL
ROM
S
R
C
2
Clock
Manager
Timers
RAM
GPIO
DAC1
DAC2
DAC3
DAC4
DAC5
DAC6
DAC7
S
R
C
1
ROM
RAM
ROM
RAM
P
Y
32K x 32-bit SRAM with three 2K blocks
Assignable to Program or Y Data memory
I
2S /
TDM /
SPDIF
Stereo Inputs
On Analog in
ADC2/3
DBC
(I
2C Slave)
PIC
ADC’s & DAC’s operate
in Single ended or
Differential mode
S
R
C
3
8ch
8ch
SRC3 has 8
independent Channels
for In or Out
4ch



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com