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LTC4446EMS8E-TRPBF データシート(PDF) 7 Page - Linear Technology |
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LTC4446EMS8E-TRPBF データシート(HTML) 7 Page - Linear Technology |
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7 / 12 page ![]() LTC4446 7 4446f OPERATION Overview The LTC4446 receives ground-referenced, low voltage digi- tal input signals to drive two N-channel power MOSFETs in a synchronous buck power supply configuration. The gate of the low side MOSFET is driven either to VCC or GND, depending on the state of the input. Similarly, the gate of the high side MOSFET is driven to either BOOST or TS by a supply bootstrapped off of the switching node (TS). Input Stage The LTC4446 employs CMOS compatible input thresholds that allow a low voltage digital signal to drive standard power MOSFETs. The LTC4446 contains an internal voltage regulator that biases both input buffers for high side and low side inputs, allowing the input thresholds (VIH = 2.75V, VIL = 2.3V) to be independent of variations in VCC. The 450mV hysteresis between VIH and VIL eliminates false triggering due to noise during switching transitions. However, care should be taken to keep both input pins (TINP and BINP) from any noise pickup, especially in high frequency, high voltage applications. The LTC4446 input buffers have high input impedance and draw negligible input current, simplifying the drive circuitry required for the inputs. Output Stage A simplified version of the LTC4446’s output stage is shown in Figure 1. The pull-up devices on the BG and TG outputs are NPN bipolar junction transistors (Q1 and Q2). The BG and TG outputs are pulled up to within an NPN VBE (~0.7V) of their positive rails (VCC and BOOST, respectively). Both BG and TG have N-channel MOSFET pull-down devices (M1 and M2) which pull BG and TG down to their nega- tive rails, GND and TS. The large voltage swing of the BG and TG output pins is important in driving external power MOSFETs, whose RDS(ON) is inversely proportional to the gate overdrive voltage (VGS − VTH). Rise/Fall Time The LTC4446’s rise and fall times are determined by the peak current capabilities of Q1 and M1. The predriver that drives Q1 and M1 uses a nonoverlapping transition scheme to minimize cross-conduction currents. M1 is fully turned off before Q1 is turned on and vice versa. Since the power MOSFET generally accounts for the ma- jority of the power loss in a converter, it is important to quickly turn it on or off, thereby minimizing the transition time in its linear region. An additional benefit of a strong pull-down on the driver outputs is the prevention of cross- conduction current. For example, when BG turns the low side (synchronous) power MOSFET off and TG turns the high side power MOSFET on, the voltage on the TS pin will rise to VIN very rapidly. This high frequency positive voltage transient will couple through the CGD capacitance of the low side power MOSFET to the BG pin. If there is an insufficient pull-down on the BG pin, the voltage on the BG pin can rise above the threshold voltage of the low side power MOSFET, momentarily turning it back on. With Figure 1. Capacitance Seen by BG and TG During Switching 6 BOOST LTC4446 8 TS TG 7 VIN UP TO 100V Q1 M1 CGS 4446 F01 CGD 3 VCC 9 GND 4 BG Q2 M2 LOW SIDE POWER MOSFET HIGH SIDE POWER MOSFET CGS CGD LOAD INDUCTOR |
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