SPT5420SIM datasheet(3/8 Pages) CADEKA

3 / 8 page

6/26/01

SPT5420

TEST LEVEL CODES

All electrical characteristics are subject to the

following conditions:

All parameters having min/max specifications

are guaranteed. The Test Level column indi-

cates the specific device testing actually per-

formed during production and Quality Assur-

ance inspection. Any blank section in the data

column indicates that the specification is not

tested at the specified condition.

LEVEL

TEST PROCEDURE

100% production tested at the specified temperature.

100% production tested at TA = +25 °C, and sample tested at the

specified temperatures.

III

QA sample tested only at the specified temperatures.

Parameter is guaranteed (but not tested) by design and characteri-

zation data.

Parameter is a typical value for information purposes only.

100% production tested at TA = +25 °C. Parameter is guaranteed

over specified temperature range.

ELECTRICAL SPECIFICATIONS

TA = TMIN to TMAX, VCC = +5.0 V, VDD = +11.5 V, VSS = –8.0 V, VREFT=3.5 V, VREFB=–1.5 V, RL = +10 kΩ, CL = 50 pF, unless otherwise specified.

TEST

SPT5420

PARAMETERS

CONDITIONS

LEVEL

MIN

TYP

MAX

UNITS

Power Requirements

VCC Supply Voltage (Digital)

4.75

5.25

VDD Supply Voltage (Analog)1,2

11.5

12.5

VSS Supply Voltage (Analog)1,2

–12.5

–8

–5V

ICC Supply Current

0.5

IDD Supply Current

Outputs Unloaded

ISS Supply Current

Outputs Unloaded

Power Supply Rejection Ratio

∆VDD / ∆Full Scale

∆VSS / ∆Full Scale

Dynamic Performance

Output Settling Time3

(Full Scale Change to ±0.5 LSB) CL ≤ 220 pF

µs

Slew Rate

2.0

V/µs

Glitch Impulse

nV-s

Channel to Channel Isolation

100

DAC to DAC Crosstalk

nV-s

Digital Crosstalk

nV-s

Digital Feedthrough

nV-s

Timing Characteristics

(See page 4)

1. Supplies should provide 2.5 V headroom above and below max output swing.

2. VDD – VSS ≤ 20 V

3. Output can drive 10,000 pF without oscillation, but with settling time degradation.

DEFINITION OF SELECTED TERMINOLOGY

Channel-to-Channel Isolation

Channel-to-Channel isolation refers to the proportion of input signal from one DAC’s reference input that appears at the output of

the other DAC. It is expressed in dBs.

DAC-to-DAC Crosstalk

DAC-to-DAC crosstalk is defined as the glitch impulse that appears at one DAC’s output due to both the digital change and subse-

quent analog output change at any other DAC. It is specified in nV-s.

Digital Crosstalk

The glitch impulse transferred to one DAC’s output due to a change in digital input code of any other DAC. It is specified in nV-s.

Digital Feedthrough

Digital feedthrough is the noise at a DAC’s output caused by changes to D0–D12 while WR is high.

SPT5420SIM データシート(PDF) 3 Page - Cadeka Microcircuits LLC.

SPT5420SIM データシート(HTML) 3 Page - Cadeka Microcircuits LLC.

Html Pages

1 2 3 4 5 6 7 8

データシートダウンロード

リンク URL

SPT5420SIM データシート(PDF) 3 Page - Cadeka Microcircuits LLC.

SPT5420SIM データシート(HTML) 3 Page - Cadeka Microcircuits LLC.

Html Pages

1 2 3 4 5 6 7 8

データシート ダウンロード

リンク URL

データシートダウンロード