TLE8201R datasheet(22/45 Pages) INFINEON

22 / 45 page

TLE 8201R

Data Sheet Rev. 2.0

2006-06-07

Figure 7

Timing Diagram

4.3.6

PWM inputs

The PWM inputs PWM1 and PWM2 are direct power stage control inputs that can be

used to switch on and off one or more of the power transistors with a PWM signal

supplied to this pin. The setting of the SPI Registers CtrlReg_01 and CtrlReg_11 defines

which of the power stages will be controlled by the PWM inputs. If the selection-bits of

4.3.5 DI data setup time

–

51)

4.3.6 DI data hold time

–

61)

4.3.7 DI data valid time

––

–1)

4.3.8 DO data setup time

DOsetup

–

7 and 81)

4.3.9 DO data hold time

DOhold

–

91)

4.3.10 No-data-time between SPI

commands

nodata

5–

–

µs101)

4.3.11 Clock frequency

––

2MHz 1)

4.3.12 Duty cycle of incoming

clock at CLK

–40

–

–1)

1) SPI Timing is not subject to production test - specified by design. SPI functional test is performed at 5 MHz CLK

frequency. Timing specified with an external load of 30pF at pin [DO].

Electrical Characteristics - SPI-timing

8 V <

S < 20 V; 4.75 V < VCC < 5.25 V; INH = High; all outputs open;

-40

°C < T

j < 150 °C; unless otherwise specified

Pos. Parameter

Sym-

bol

Limit Values

Unit Conditions

min.

typ.

max.

CSN

CLK

not defined

MSB

LSB

Flag

MSB

LSB

TLE8201R データシート(PDF) 22 Page - Infineon Technologies AG

TLE8201R データシート(HTML) 22 Page - Infineon Technologies AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45

データシートダウンロード