ATmega128 datasheet(18/386 Pages) ATMEL

18 / 386 page

2467S–AVR–07/09

ATmega128

AVR

ATmega128

Memories

This section describes the different memories in the ATmega128. The AVR architecture has two

main memory spaces, the Data Memory and the Program Memory space. In addition, the

ATmega128 features an EEPROM Memory for data storage. All three memory spaces are linear

and regular.

In-System

Reprogrammable

Flash Program

Memory

The ATmega128 contains 128K bytes On-chip In-System Reprogrammable Flash memory for

program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized as

64K x 16. For software security, the Flash Program memory space is divided into two sections,

Boot Program section and Application Program section.

The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATmega128

Program Counter (PC) is 16 bits wide, thus addressing the 64K program memory locations. The

operation of Boot Program section and associated Boot Lock bits for software protection are

described in detail in “Boot Loader Support – Read-While-Write Self-Programming” on page

273. “Memory Programming” on page 286 contains a detailed description on Flash programming

in SPI, JTAG, or Parallel Programming mode.

Constant tables can be allocated within the entire program memory address space (see the LPM

– Load Program Memory and ELPM – Extended Load Program Memory instruction description).

Timing diagrams for instruction fetch and execution are presented in “Instruction Execution Tim-

ing” on page 14.

Figure 8. Program Memory Map

$0000

$FFFF

Program Memory

Application Flash Section

Boot Flash Section

ATmega128 データシート(PDF) 18 Page - ATMEL Corporation