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MAXQ3183-RAN+ データシート(PDF) 78 Page - Maxim Integrated Products |
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MAXQ3183-RAN+ データシート(HTML) 78 Page - Maxim Integrated Products |
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78 / 102 page ![]() Low-Power, Multifunction, Polyphase AFE with Harmonics and Tamper Detect 78 ______________________________________________________________________________________ DSP System Configuration System Clock Frequency (SYS_KHZ) (0x012) This register contains the system clock frequency in kHz units. Because the default frequency is 8MHz, this register defaults to 0x1F40. Cycle Count (CYCNT) (0x01C) This register contains the number of line cycles that will be accumulated in a single DSP cycle. When CYCNT line cycles have been accumulated, the DSP performs power, power factor, and energy calculations. By default, the cycle count is 0x10 (16 decimal). Bit: 15 14 13 12 11 10 9 8 Name: Cycle Count High Byte Reset: 0x00 Bit: 7 6 5 4 3 2 1 0 Name: Cycle Count Low Byte Reset: 0x10 Bit: 15 14 13 12 11 10 9 8 Name: System Clock Frequency High Byte Reset: 0x1F Bit: 7 6 5 4 3 2 1 0 Name: System Clock Frequency Low Byte Reset: 0x40 |
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