MPC5634M datasheet(76/118 Pages) FREESCALE

76 / 118 page

MPC5634M Microcontroller Data Sheet, Rev. 4

Preliminary—Subject to Change Without Notice

Electrical characteristics

Freescale Semiconductor

8 Regulator is functional, with derated performance, with supply voltage down to 4.0 V.

9 Multi-voltage pads (type pad_multv_hv) cannot be below 4.5 V when in low-swing mode.

10 The slew rate (SRC) setting must be 0b11 when in low-swing mode.

11 While in low-swing mode there are no restrictions in transitioning to high-swing mode.

12 Pin in low-swing mode can accept a 5 V input.

13 Values are pending characterization.

14 Pin in low-swing mode can accept a 5 V input.

15 Characterization based capability:

IOH_S = {6, 11.6} mA and IOL_S = {9.2, 17.7} mA for {slow, medium} I/O with VDDEH=4.5 V;

IOH_S = {2.8, 5.4} mA and IOL_S = {4.2, 8.1} mA for {slow, medium} I/O with VDDEH=3.0 V

16 Characterization based capability:

IOH_F = {12, 20, 30, 40} mA and IOL_F = {24, 40, 50, 65} mA for {00, 01,10, 11} drive mode with VDDE=3.0 V;

IOH_F = {7, 13, 18, 25} mA and IOL_F = {18, 30, 35, 50} mA for {00, 01, 10, 11} drive mode with VDDE=2.25 V;

IOH_F = {3, 7, 10, 15} mA and IOL_F = {12, 20, 27, 35} mA for {00, 01, 10, 11} drive mode with VDDE=1.62 V

17 All VOL/VOH values 100% tested with ± 2 mA load.

18 Run mode as follows:

System clock = 40/60/80 MHz + FM 2%

Code executed from flash memory

ADC0 at 16 MHz with DMA enabled

ADC1 at 8 MHz

eMIOS pads toggle in PWM mode with a rate between 10 kHz and 10 kHz

eTPU pads toggle in PWM mode with a rate between 10 kHz and 500 kHz

CAN configured for a bit rate of 500 kHz

DSPI configured in master mode with a bit rate of 2 MHz

eSCI transmission configured with a bit rate of 100 kHz

19 Bypass mode, system clock at 1 MHz (using system clock divider), PLL shut down, CPU running simple executive code,

4 x ADC conversion every 10 ms, 2 x PWM channels at 1 kHz, all other modules stopped.

20 Bypass mode, system clock at 1 MHz (using system clock divider), CPU stopped, PIT running, all other modules stopped.

21 Power requirements for each I/O segment are dependent on the frequency of operation and load of the I/O pins on a

particular I/O segment, and the voltage of the I/O segment. See Table 20 for values to calculate power dissipation for specific

operation. The total power consumption of an I/O segment is the sum of the individual power consumptions for each pin on

the segment.

22 Absolute value of current, measured at V

IL and VIH.

23 Weak pull up/down inactive. Measured at V

DDE = 3.6 V and VDDEH = 5.25 V. Applies to pad types: fast (pad_fc).

24 Maximum leakage occurs at maximum operating temperature. Leakage current decreases by approximately one-half for

each 8 to 12 oC, in the ambient temperature range of 50 to 125 oC. Applies to pad types: pad_a and pad_ae.

25 Applies to CLKOUT, external bus pins, and Nexus pins.

26 Applies to the FCK, SDI, SDO, and SDS pins.

27 This programmable option applies only to eQADC differential input channels and is used for biasing and sensor diagnostics.

28 When the pull-up and pull-down of the same nominal 200 K

Ω or 100 KΩ value are both enabled, assuming no interference

from external devices, the resulting pad voltage will be 0.5*VDDE ±2.5%

MPC5634M データシート(PDF) 76 Page - Freescale Semiconductor, Inc

MPC5634M データシート(HTML) 76 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

データシートダウンロード