DM9102DEP datasheet(65/70 Pages) DAVICOM

部品番号	DM9102DEP

部品情報	Single Chip Fast Ethernet NIC Controller

PDF	70 Pages

Scroll/Zoom	100%

メーカー	DAVICOM [Davicom Semiconductor, Inc.]

ホームページ	http://www.davicom.com.tw

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65 / 70 page

Final

Version: DM9102D-DS-F01

May 10, 2006

9.5 Ground Plane Layout

•

Place

single

ground

plane

approach

minimize EMI. Bad ground plane partitioning can

cause more EMI emissions that could make the

network interface card (NIC) not compliant with

specific FCC part 15 and CE regulations.

•

The ground plane must be separated into Analog

ground domain and Digital ground domain. The

line which connects the analog ground domain

and digital ground domain should be far away

from the AGND pins of DM9102D (see Figure

9-4-1).

•

All AGND pins (pin 100, 107, 108) could not

directly short each other (see Figure 9-4-3). It

must be directly connected to the analog ground

domain (see Figure 9-4-2).

•

The analog ground domain area is as large as

possible

Figure 9-4-1

Analog ground domain

Digital ground domain

AGND

Better

Analog ground domain

Digital ground domain

AGND

Worse! AGND direct short

Figure 9-4-2

Figure 9-4-3

25MHz

X'tal

DM9102DEP データシート(PDF) 65 Page - Davicom Semiconductor, Inc.

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