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DM9102DEP データシート(PDF) 29 Page - Davicom Semiconductor, Inc.

部品番号 DM9102DEP
部品情報  Single Chip Fast Ethernet NIC Controller
PDF  70 Pages
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メーカー  DAVICOM [Davicom Semiconductor, Inc.]
ホームページ  http://www.davicom.com.tw
Logo DAVICOM - Davicom Semiconductor, Inc.

DM9102DEP データシート(HTML) 29 Page - Davicom Semiconductor, Inc.

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Final
29
Version: DM9102D-DS-F01
May 10, 2006
31
30
29 28 27 26 25 24 23 22 21 20 19 18
17 16
15 14 13 12
11 10
98
7
6
54
3
2
1
0
Bit
Name
Default
Description
31
MDIX
0,RO
Status of disable HP Auto-MDIX function
30
MFUN
0,RO
Multi-function strap pin status
29
LEDM
0,RO
LED mode strap pin status
28:27
Reserved
0,RO
Reserved
26
FDX
X,RO
Full-duplex status of internal PHY.
25
LNK100
X,RO
100M link status of internal PHY.
24
LNK10
X,RO
10M link status of internal PHY
23
RSTPHY
0,RW
PHY Reset
Write 1 to this bit will reset internal PHY.
22
Reserved
0,RO
Reserved
21
LES
0,RO
Load EEPROM status
It is set to indicate the load of EEPROM is in progress.
20
RLM
0,RW
Reload EEPROM
Set to reload the content of EEPROM.
19
MDIN
0,RO
MII Management Data_In
This is a read-only bit to indicate the MDIO input data, when bit 18 MRW is set.
18
MRW
0,RW
MII Management Read/Write Mode Selection
This bit defines the Read/Write Mode for PHY MII management register access. 1
for read and 0 for write.
17
MDOUT
0,RW
MII Management Data_Out
This bit is used to generate the output data signal for PHY MII management register
access.
16
MDCLK
0,RW
MII Management Clock
This bit is used to generate the output clock signal for PHY MII management
register access.
15:12
Reserved
1000,RO
Reserved.
11
ERS
0,RW
EEPROM Selected
This bit is used to enable EEPROM access.
10:8
Reserved
011,RW
Reserved
7:4
Reserved
FH,RO
Reserved
3
CRDOUT
0,RW
Data_Out from EEPROM
This bit reflects the status of EEDI pin when the EEPROM access is enabled.
2
CRDIN
0,RW
Data_In to EEPROM
This bit maps to EEDO pin when the EEPROM access is enabled.
1
CRCLK
0,RW
Clock to EEPROM
This bit maps EECK pin when the EEPROM access is enabled
0
CRCS
0,RW
Chip_Select to EEPROM
This bit maps to EECS pin when the EEPROM access is enabled
6.2.11 PHY Status Register (CR12)



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