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CS4294/CS4298 データシート(PDF) 27 Page - Cirrus Logic

部品番号 CS4294/CS4298
部品情報  Audio Codec ??7 with Headphone Amplifier
PDF  66 Pages
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メーカー  CIRRUS [Cirrus Logic]
ホームページ  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS4294/CS4298 データシート(HTML) 27 Page - Cirrus Logic

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CS4202
DS549PP2
27
4.9
Record Gain Register (Index 1Ch)
Mute
Record Gain Mute. Setting this bit mutes the input to the L/R ADCs.
GL[3:0]
Left ADC Gain. The GL[3:0] bits control the input gain on the left channel of the analog
source, applied after the input mux and before the ADCs. Each step corresponds to 1.5 dB
gain adjustment, with 0000 = 0 dB. The total range is 0 dB to +22.5 dB gain. See Table 7 for
further details.
GR[3:0]
Right ADC Gain. The GR[3:0] bits control the input gain on the right channel of the analog
source, applied after the input mux and before the ADCs. Each step corresponds to 1.5 dB
gain adjustment, with 0000 = 0 dB. The total range is 0 dB to +22.5 dB gain. See Table 7 for
further details.
Default
8000h. This value corresponds to 0 dB gain and Mute ‘set’.
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Mute
000
GL3
GL2
GL1
GL0
0000
GR3
GR2
GR1
GR0
Gx3 - Gx0 Gain Level
1111
+22.5 dB
……
0001
+1.5 dB
0000
0 dB
Table 7. Record Gain Values



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