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P89LPC9331FDH データシート(PDF) 11 Page - NXP Semiconductors |
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P89LPC9331FDH データシート(HTML) 11 Page - NXP Semiconductors |
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11 / 93 page ![]() P89LPC9331_9341_9351_9361_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 2 June 2009 11 of 93 NXP Semiconductors P89LPC9331/9341/9351/9361 8-bit microcontroller with accelerated two-clock 80C51 core [1] Input/output for P1.0 to P1.4, P1.6, P1.7. Input for P1.5. P3.0/XTAL2/ CLKOUT 9 I/O P3.0 — Port 3 bit 0. O XTAL2 — Output from the oscillator amplifier (when a crystal oscillator option is selected via the flash configuration. O CLKOUT — CPU clock divided by 2 when enabled via SFR bit (ENCLK -TRIM.6). It can be used if the CPU clock is the internal RC oscillator, watchdog oscillator or external clock input, except when XTAL1/XTAL2 are used to generate clock source for the RTC/system timer. P3.1/XTAL1 8 I/O P3.1 — Port 3 bit 1. I XTAL1 — Input to the oscillator circuit and internal clock generator circuits (when selected via the flash configuration). It can be a port pin if internal RC oscillator or watchdog oscillator is used as the CPU clock source, and if XTAL1/XTAL2 are not used to generate the clock for the RTC/system timer. VSS 7I Ground: 0 V reference. VDD 21 I Power supply: This is the power supply voltage for normal operation as well as Idle and Power-down modes. Table 3. Pin description …continued Symbol Pin Type Description PLCC28, TSSOP28 |
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