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CY8C52 データシート(PDF) 73 Page - Cypress Semiconductor |
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CY8C52 データシート(HTML) 73 Page - Cypress Semiconductor |
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73 / 94 page ![]() PRELIMINARY PSoC® 5: CY8C52 Family Datasheet Document Number: 001-66236 Rev. ** Page 73 of 94 11.2.6 Voltage Digital to Analog Converter (VDAC) See the VDAC component data sheet in PSoC Creator for full electrical specifications and APIs. Unless otherwise specified, all charts and graphs show typical values. Figure 11-34. VDAC INL vs Input Code, 1 V Mode Figure 11-35. VDAC DNL vs Input Code, 1 V Mode Table 11-26. VDAC DC Specifications Parameter Description Conditions Min Typ Max Units Resolution – 8 – bits INL1 Integral nonlinearity 1 V scale – ±2.1 ±2.5 LSB DNL1 Differential nonlinearity 1 V scale – ±0.3 ±1 LSB Rout Output resistance 1 V scale – 4 – k Ω 4 V scale – 16 – k Ω VOUT Output voltage range, code = 255 1 V scale – 1 – V 4 V scale, Vdda = 5 V – 4 – V Monotonicity – – Yes – VOS Zero scale error – 0 ±0.9 LSB Eg Gain error 1 V scale – – ±2.5 % 4 V scale – – ±2.5 % TC_Eg Temperature coefficient, gain error 1 V scale – – 0.03 %FSR / °C 4 V scale – – 0.03 %FSR / °C IDD Operating current Slow mode – – 100 µA Fast mode – – 500 µA [+] Feedback [+] Feedback [+] Feedback |
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