LM3447

SNOSC65 A – APRIL 2012 – REVISED MAY 2012

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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

TEMPERATURE

ORDERABLE DEVICE

TRANSPORT

RANGE

PINS

PACKAGE DRAWING

QUANTITY

NUMBER

MEDIA

LM3447MT

Tube

94

–40°C to 125°C

TSSOP

14

MTC14

LM3447MTE

Tape and Reel

250

LM3447MTX

Tape and Reel

2500

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

(2)

Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

ABSOLUTE MAXIMUM RATINGS

(1)

terminal (unless otherwise noted)

VALUE

UNIT

MIN

MAX

Supply voltage

–0.3

22

V

–0.3

22

V

Input voltage range

–0.3

6

V

TSNS, FLT1, FLT2, FF, INV, COMP, ISNS, AUX

–0.3

6

V

Output voltage range

–1.5

19

V

Continuous input current

(4)

10

mA

Junction temperature

(5)

165

°C

–65

150

°C

Lead temperature

Soldering, 10s

260

°C

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

VCC is internally limited to approximately 18.9V. See ELECTRICAL CHARACTERISTICS table.

(3)

HOLD current is limited by the internal power dissipation of the device.

(4)

Voltage on VAC and BIAS is internally clamped. The clamp level varies with operating conditions. In normal use, VAC and BIAS are

current fed with the voltage internally limited.

(5)

Maximum junction temperature is internally limited.

PACKAGE DISSIPATION RATINGS

(1) (2)

PACKAGE

TO AMBIENT,NO AIRFLOW

POWER RATING

POWER RATING

POWER RATING

(°C/W)

(mW)

(mW)

(mW)

TSSOP–14 (MTC)

(1)

Tested per JEDEC EIA/JESD51-1. Thermal resistance is a function of board construction and layout. Air flow reduces thermal

resistance. This number is included only as a general guideline; see TI document (SPRA953) device Package Thermal Metrics.

(2)

Thermal resistance to the circuit board is lower. Measured with standard single-sided PCB construction. Board temperature, TB,

measured approximately 1 cm from the lead to board interface. This number is provided only as a general guideline.

(3)

2

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