1

2

3

4

11

10

9

8

5

6

7

12

13

14

VAC

TSNS

FLT1

FLT2

FF

INV

COMP

GND

ISNS

GATE

VCC

AUX

HOLD

BIAS

TSSOP-14 PACKAGE

(Top View)

LM3447

SNOSC65 A – APRIL 2012 – REVISED MAY 2012

www.ti.com

PIN CONFIGURATION

PIN FUNCTIONS

NO.

NAME

I/O

DESCRIPTION

The current at this pin sets the input power level during normal operation. Connect through a resistor to

1

VAC

I

rectified input line voltage.

2

TSNS

I

To implement thermal foldback, connect this pin to an external negative temperature coefficient (NTC) resistor.

This pin is the output of angle sense comparator. Connect a series resistor from this pin to a capacitor to

3

FLT1

O

ground to establish the low pass filter bandwidth.

Connect this pin to the output of low pass filter from FLT1 pin to enable dimming. This pin is an input to the

4

FLT2

I

internal dim decoder circuitry. For non-dimming applications connect this pin to TSNS.

Connect a parallel resistor and capacitor from this pin to ground to filter twice the line frequency ripple. This is

5

FF

O

the output of the input voltage feedforward circuitry.

This pin is the input of the internal Gm error amplifier. To implement primary side power regulation, connect this

6

INV

I

to the FF. To implement secondary side current regulation, connect this pin to the output of opto-isolator circuit.

Output of the Gm error amplifier. Connect a capacitor to ground set desired integral loop compensation

7

COMP

I/O

bandwidth.

8

GND

Ground return

Connect to the source of the switching MOSEFT and a resistor ground to sense transistor current. Overcurrent

9

ISNS

I

protection is engaged when the voltage exceeds 275mV threshold.

10

GATE

O

This output provides the gate drive for the power switching MOSEFT.

This is the input to the internal pre-regulator. Connect a bypass capacitor to ground. This pin enables and

11

VCC

disables general functions of the LM3447 using the UVLO feature. Device enters overvoltage protection mode

when the voltage is >18.9V.

This pin is used to sense the auxiliary winding voltage and perform valley switching operation. Overvoltage

12

AUX

I

protection is engaged when the voltage exceeds the threshold of 1.75V during off time.

Connect to a holding resistor from the drain of the pre-regulator to this pin. The pin draws current during the

13

HOLD

zero crossings of the rectified input line voltage.

Connect to external pre-regulator transistor to enable startup. When VCC is below UVLO threshold the pin is

14

BIAS

clamped to 17.7V. After VCC crosses UVLO threshold the pin is clamped to 13.5V.

6

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