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A8290 データシート(PDF) 16 Page - Allegro MicroSystems |
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A8290 データシート(HTML) 16 Page - Allegro MicroSystems |
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16 / 20 page ![]() Single LNB Supply and Control Voltage Regulator A8290 16 Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com Table 6. Status Register 1 Bit Name Function 0 DIS LNB output disabled 1 – Not Used 2 OCP Overcurrent 3 – Not Used 4 PNG Power Not Good 5 – Not Used 6 TSD Thermal Shutdown 7 VUV VIN Undervoltage Bit 0 DIS LNB Output Disabled. DIS is used to indicate the current condition of the LNB output. At power-on, or if a fault condition occurs, DIS will be set. This bit changing to 1 does not cause the IRQ to activate because the LNB output may be disabled in- tentionally by the I2C™ master. This bit will be reset at the end of a write sequence if the LNB output is enabled. Bit 1 – Not used. Bit 2 OCP Overcurrent. If the LNB output detects an overcurrent condition, for greater than 48 ms, the LNB output will be disabled. The OCP bit will be set to indicate that an overcurrent has occurred and the disable bit, DIS, will be set. The Status register is updated on the rising edge of the 9th clock pulse in the data read sequence, where the OCP bit is reset in all cases, allowing the master to reenable the LNB output. Bit 3 – Not used. Bit 4 PNG Power Not Good. Set to 1 when the LNB voltage is below 85% of the programmed voltage. The PNG bit is reset when the LNB voltage is within 90% of the pro- grammed LNB voltage. PNG is always active so, if the LNB output is disabled, then PNG will be a logic 1. At power-up, PNG reports a logic 1 until the LNB output is enabled and within 90% of the programmed LNB voltage. Bit 5 – Not used. Bit 6 TSD Thermal shutdown. 1 indicates that the A8290 has detected an overtemperature condition and has disabled the LNB output. The disable bit, DIS, will also be set. The status of the overtemperature condition is sampled on the rising edge of the 9th clock pulse in the data read sequence. If the condition is no longer present, then the TSD bit will be reset, allowing the master to reenable the LNB output if required. If the condition is still present, then the TSD bit will remain at 1. Bit 7 VUV Undervoltage Lockout. 1 indicates that the A8290 has detected that the input sup- ply, VIN is, or has been, below the minimum level and an undervoltage lockout has occurred disabling the LNB outputs. The disable bit, DIS, will also be set and the A8290 will not reenable the output until so instructed by writing the relevant bit into the control registers. The status of the undervoltage condition is sampled on the rising edge of the 9th clock pulse in the data read sequence. If the condition is no longer present, then the VUV bit will be reset allowing the master to reenable the LNB out- put if required. If the condition is still present, then the VUV bit will remain at 1. |
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