82563EB datasheet(49/52 Pages) INTEL

49 / 52 page

82563EB/82564EB Gigabit Platform LAN Connect Networking Silicon

5.4

Interface Diagrams

Figure 13. 82563EB/82564EB Interfaces

Kumeran Port A

Clocks

MDIO Interface

PHY A

TXA _PLUS

Port A LEDs

TXA _MINUS

RXA _PLUS

RXA _MINUS

MDIA_PLUS [3:0]

MDIA_MINUS [3:0]

Chipwide

Power /Ground

Reset

/ Power Down

/ Initialization

MDC

MDIO

MDIO _ADD[3:0]

XTAL 1

XTAL 2

PHY _CLK _OUT

PHY _PWR _GOOD

PHY _RESET _N

PHY _SLEEP

LEDA _LINK _UP _N

JTAG _TCK

JTAG _TDI

JTAG _TDO

JTAG _TMS

JTAG

DVDD (1.2V)

AVDD (1.

9V)

VDDO (3.3V)

VSS

LINK _A

PHY B

Kumeran Port B

Voltage

Control

CTRL _12

CTRL _18

LINK _B

MDIB _PLUS [3:0]

MDIB _MINUS [3:0]

TXB _PLUS

TXB _MINUS

RXB _PLUS

RXB _MINUS

LEDA _ACTIVITY _N

LEDA _SPEED _100 _N

LEDA _SPEED _1000 _N

LEDA _DUPLEX _N

LEDA _TX _ACTIVITY _N

LEDA _RX _ACTIVITY _N

Port B LEDs

AVDDF (1.

9V)

AVDDR (3.3V )

PHY Reference

PHY _REF

LEDB _LINK _UP _N

LEDB _ACTIVITY _N

LEDB _SPEED _100 _N

LEDB _SPEED _1000 _N

LEDB _DUPLEX _N

LEDB _TX _ACTIVITY _N

LEDB _RX _ACTIVITY _N

TEST _JTAG

82563EB データシート(PDF) 49 Page - Intel Corporation

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