AD5258

Data Sheet

Rev. D | Page 16 of 24

The following generic, write, read, and store/restore control

registers for the AD5258 refer to the device addresses listed in

Table 5, and following is the mode/condition reference key.

•

S = Start Condition

•

P = Stop Condition

•

SA = Slave Acknowledge

•

MA = Master Acknowledge

•

NA = No Acknowledge

•

W = Write

•

R = Read

•

X = Don’t Care

•

AD1 and AD0 are two-state address pins.

Table 5. Device Address Lookup

AD1 Address Pin

AD0 Address Pin

0

0

0011000

1

0

0011010

0

1

1001100

1

1

1001110

GENERIC INTERFACE

Table 6. Generic Interface Format

S

7-Bit Device Address

(See Table 5)

R/W SA C2 C1 C0 A4 A3 A2 A1 A0 SA D7 D6 D5 D4 D3 D2 D1 D0 SA P

Slave Address Byte

Instruction Byte

Data Byte

Table 7. RDAC-to-EEPROM Interface Command Descriptions

C2

C1

C0

Command Description

0

0

0

0

0

1

0

1

0

1

0

0

NOP

1

0

1

Restore EEPROM to RDAC1

1

1

0

Store RDAC to EEPROM

1

This command leaves the device in the EEMEM read power state, which consumes power. Issue the NOP command to return the device to its idle state.

WRITE MODES

Table 8. Writing to RDAC Register

S

7-Bit Device Address

(See Table 5)

0

SA

0 0 0 0 0 0 0 0

SA

X X

D5

D4

D3

D2

D1

D0

SA P

Slave Address Byte

Instruction Byte

Data Byte

Table 9. Writing to EEPROM Register

S

7-Bit Device Address

(See Table 5)

0

SA

0 0 1 0 0 0 0 0

SA

X

X

D5

D4

D3

D2

D1

D0

SA

P

Slave Address Byte

Instruction Byte

Data Byte

The wiper’s default value prior to programming the EEPROM is midscale.

Table 10. Activating/Deactivating Software Write Protect

S

7-Bit Device Address

(See Table 5)

0

SA

0

1

0

0

0

0

0

0

SA

0

0

0

0

0

0

0

WP

SA

P

Slave Address Byte

Instruction Byte

Data Byte

To activate the write protection mode, the WP bit in Table 10 must be logic high. To deactivate the write protection, the command must

be resent except with the WP in logic zero state.