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AD6620AS データシート(PDF) 8 Page - Analog Devices |
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AD6620AS データシート(HTML) 8 Page - Analog Devices |
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8 / 44 page  AD6620 –8– REV. A SERIAL PORT: BUS MASTER RESET with PAR/SER = “0” establishes Serial Port active. SBM = “1” puts AD6620 in Serial Bus Master mode SCLK is output; SDFS is output. tSCLKD tSCLKL tSCLKH CLK SCLK tSCLK Figure 9. SCLK Switching Characteristics tSSI tHSI DATA SDI SCLK Figure 10. Serial Input Data Timing Requirements SCLK tDSF tDSE tSDFEH tSDFSH SDFS SDFE Figure 11. Serial Frame Switching Characteristics tDSO I15 I14 I13 SCLK SDO Figure 12. Serial Output Data Switching Characteristics SERIAL PORT: CASCADE MODE RESET with PAR/SER = “0” establishes Serial Port active. SBM = “0” puts AD6620 in Serial Port Cascade mode, SCLK is input; SDFS is input. tSCLK tSCLKH tSCLKL SCLK Figure 13. SCLK Timing Requirements tSSI tHSI SCLK SDI DATA Figure 14. Serial Input Data Timing Requirements tHSRF I15 I14 SCLK SDO tHSF Q1 Q0 SDFS tSSF Figure 15. SDO/SDFS Timing Requirements tDSO I15 I14 SCLK SDO tDSE tSDFEH Q1 Q0 SDFE Figure 16. SDO, SDFE Switching Characteristics |
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