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AM85C30 データシート(PDF) 182 Page - Advanced Micro Devices |
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AM85C30 データシート(HTML) 182 Page - Advanced Micro Devices |
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182 / 194 page  SCC Application Notes AMD 7–33 Similarly, on the receive side, bit D0 of Read Register 0 is monitored to determine a re- ceive character available condition. This bit is reset if the receive FIFO is completely empty. Address line AD1 selects either synchronous or asynchronous data transfers. Hence, before transmission, the user can select whether the data transfer is over a 1 Mb/ s-network to similar PCs, or over a slower link to a printer. SUMMARY The Am8530H can be software-manipulated to perform at a higher degree of sophistica- tion without any change in hardware connections. Changing or adding to the software does not affect the Am7960 operation. Hence, the Am7960 provides an easy upgrade (high-speed, greater distance, common-mode isola- tion) for most modern modem circuits that use RS-422 drivers and receivers. |
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