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STM8S103F2U6TR データシート(PDF) 79 Page - STMicroelectronics

部品番号 STM8S103F2U6TR
部品情報  Access line, 16 MHz STM8S 8-bit MCU, up to 8 Kbytes Flash, data EEPROM,10-bit ADC, 3 timers, UART, SPI, I²C
PDF  113 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM8S103F2U6TR データシート(HTML) 79 Page - STMicroelectronics

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Figure 37: Typical NRST pull-up current vs VDD @ 4 temperatures
The reset network shown in the following figure protects the device against parasitic resets.
The user must ensure that the level on the NRST pin can go below the VIL max. level specified
in the I/O port pin characteristics section. Otherwise the reset is not taken into account
internally.
Figure 38: Recommended reset pin protection
External
reset
circuit
(optional)
0.1 μF
NRST
VDD
RPU
Filter
Internal reset
STM8
SPI serial peripheral interface
10.3.8
Unless otherwise specified, the parameters given in the following table are derived from tests
performed under ambient temperature, fMASTER frequency and VDD supply voltage conditions.
tMASTER = 1/fMASTER.
Refer to I/O port characteristics for more details on the input/output alternate function
characteristics (NSS, SCK, MOSI, MISO).
79/113
DocID15441 Rev 6
Electrical characteristics
STM8S103K3 STM8S103F3 STM8S103F2



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