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AS8515 データシート(PDF) 48 Page - ams AG |
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AS8515 データシート(HTML) 48 Page - ams AG |
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48 / 65 page  www.ams.com Revision 0.7 48 - 65 AS8515 Datasheet - 4-Wi re SP I Interf ace Figure 32. Timing for Reading 9.2 Bottom Die Registers This section describes the control registers used in AS8515 Bottom die. Registers can be broadly classified into the following categories. Data access registers Status Registers Digital signal path control registers Digital Control registers Analog Control Registers Table 49. Control Registers Addr in HEX Register Name POR Value R/W 8-bit Control / Status Data Data Access Registers 00 DREG_I1 (ADC Data Register for Current) 0000_0000 R D[7:0] Denotes the Current ADC MSB Byte (ADC_I[15:8]) 01 DREG_I2 (ADC Data Register for Current) 0000_0000 R D[7:0] Denotes the Current ADC LSB Byte (ADC_I[7:0]) 02 DREG_V1 (ADC Data Register for Voltage) 0000_0000 R D[7:0] Denotes the Voltage ADC MSB Byte (ADC_V[15:8]) 03 DREG_V2 (ADC Data Register for Voltage) 0000_0000 R D[7:0] Denotes the Voltage ADC LSB Byte (ADC_V[7:0]) CS SCLK SDI SDO t DOHZ t DOD DATAI DATAI DATAO (D7) DATAO (D0) t SCLKH t SCLKL |
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