L6717 datasheet(43/56 Pages) STMICROELECTRONICS

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L6717

Output voltage monitoring and protections

Doc ID 17326 Rev 1

43/56

soon as the difference between the output and the input of this OpAmp is higher than

500mV, the device latches in HiZ. FLT pin is driven high.

To recover from a latch condition, cycle VCC or EN.

Figure 14.

FB disconnection protection

8.3

PWRGOOD

It is an open-drain signal set free after the soft-start sequence has finished; it is the logic

AND between the internal CORE and NB PGOOD (or just the CORE PGOOD in PVI mode).

It is pulled low when the output voltage of one of the two sections drops 250 mV below the

programmed voltage. It is masked during on-the-fly VID transitions as well as when the

CORE section is set to OFF (from SVI bus) while the NB section is still operative.

8.4

Overcurrent

The overcurrent threshold has to be programmed to a safe value, in order to be sure that

each section doesn't enter OC during normal operation of the device. This value must take

into consideration also the extra current needed during the OTF-VID transition (IOTF-VID) and

the process spread and temperature variations of the sensing elements (Inductor DCR).

Moreover, since also the internal threshold spreads, the design has to consider the mini-

mum/maximum values of the threshold. Considering the reading method, the two sections

will show different behaviors in OC.

8.4.1

CORE section

L6717 performs two different OC protections for the CORE section: it monitors both the total

current and the per-phase current and allows to set an OC threshold for both.

–

Per-phase OC.

Maximum information current per-phase (IINFOx) is internally limited to 35 μA. This

end-of-scale current (IOC_TH) is compared with the information current generated

for each phase (IINFOx). If the current information for the single phase exceed the

end-of-scale current (i.e. if IINFOx > IOC_TH), the device will turn-on the LS

MOSFET until the threshold is re-crossed (i.e. until IINFOx < IOC_TH).

–

Total current OC.

ILIM pin allows to define a maximum total output current for the system (IOC_TOT).

ILIM current is sourced from the ILIM pin (not altered by DRP_ADJ command). By

connecting a resistor RILIM to SGND, a load indicator with 2.5 V (VOC_TOT) end-of-

CORE_REFERENCE

COMP

VSEN

FBG

RFB

To VDD_CORE

(Remote Sense)

from DAC...

CORE and NB SECTION - VSEN AND FBG DISCONNECTION

500mV

FBG DISCONNECTED

CS1-

600mV

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