NG80960JS25 datasheet(69/86 Pages) INTEL

部品番号	NG80960JS25

部品情報	80960JA/JF/JD/JS/JC/JT 3.3 V Embedded 32-Bit Microprocessor

PDF	86 Pages

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メーカー	INTEL [Intel Corporation]

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80960JA/JF/JD/JS/JC/JT 3.3 V Embedded 32-Bit Microprocessor

Datasheet

7.0

Bus Functional Waveforms

Figure 42 through Figure 47 illustrate typical 80960Jx bus transactions. Figure 48 depicts the bus

arbitration sequence. Figure 49 illustrates the processor reset sequence from the time power is

applied to the device. Figure 50 illustrates the processor reset sequence when the processor is in

operation. Figure 51 illustrates the processor ONCE# sequence from the time power is applied to

the device. Figure 53 and Figure 54 also show accesses on 32-bit buses. Table 44 through Table 46

summarize all possible combinations of bus accesses across 8-, 16-, and 32-bit buses according to

data alignment.

Figure 42. Non-Burst Read and Write Transactions Without Wait States, 32-Bit Bus

CLKIN

AD31:0

ALE

ADS#

A3:2

BE3:0#

WIDTH1:0

D/C#

W/R#

DT/R#

DEN#

RDYRCV#

BLAST#

ADDR

Invalid

ADDR

DATA Out

F_JF030A

NG80960JS25 データシート(PDF) 69 Page - Intel Corporation