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NG80960JS25 データシート(PDF) 44 Page - Intel Corporation

部品番号 NG80960JS25
部品情報  80960JA/JF/JD/JS/JC/JT 3.3 V Embedded 32-Bit Microprocessor
PDF  86 Pages
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メーカー  INTEL [Intel Corporation]
ホームページ  http://www.intel.com
Logo INTEL - Intel Corporation

NG80960JS25 データシート(HTML) 44 Page - Intel Corporation

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80960JA/JF/JD/JS/JC/JT 3.3 V Embedded 32-Bit Microprocessor
44
Datasheet
TIH4
Input Hold from RESET# — ONCE#,
STEST
80960JS/JC/JT
80960JD
80960JA/JF
2
2
1
ns
(8)
Relative Output Timings
TLX
Address Valid to ALE/ALE# Inactive
For 3.3 V Data Input Signals
For 5.0 V Data Input Signals
0.5TC - 5
0.5TC - 8
ns
(9)
TLXL
ALE/ALE# Width
0.5TC - 7
ns
Equal Loading (9)
TLXA
Address Hold from ALE/ALE# Inactive
TDXD
DT/R# Valid to DEN# Active
Boundary Scan Test Signal Timings
TBSF
TCK Frequency
0.5TF
MHz
TBSCH
TCK High Time
15
ns
Measured at 1.5 V (1)
TBSCL
TCK Low Time
15
ns
Measured at 1.5 V (1)
TBSCR
TCK Rise Time
5
ns
0.8 V to 2.0 V (1)
TBSCF
TCK Fall Time
5
ns
2.0 V to 0.8 V (1)
TBSIS1
Input Setup to TCK — TDI, TMS
4
ns
TBSIH1
Input Hold from TCK — TDI, TMS
6
ns
TBSOV1
TDO Valid Delay
3
30
ns
(1, 10)
TBSOF1
TDO Float Delay
3
30
ns
(1, 10)
TBSOV2
All Outputs (Non-Test) Valid Delay
3
30
ns
(1, 10)
TBSOF2
All Outputs (Non-Test) Float Delay
3
30
ns
(1, 10)
TBSIS2
Input Setup to TCK — All Inputs
(Non-Test)
4ns
TBSIH2
Input Hold from TCK — All Inputs
(Non-Test)
6ns
Table 22. 80960Jx A.C. Characteristics (Sheet 3 of 3)
Symbol
Parameter
Min
Max
Unit
Notes
NOTE: See Table 23 on page 45 for note definitions for this table.



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