STMPE1801 datasheet(15/60 Pages) STMICROELECTRONICS

15 / 60 page

STMPE1801

I2C specification

Doc ID 17884 Rev 3

15/60

6.5

Acknowledge bit (ACK)

The acknowledge bit is used to indicate a successful byte transfer. The bus transmitter

releases the SDA after sending eight bits of data. During the ninth bit, the receiver pulls the

SDA low to acknowledge the receipt of the eight bits of data. The receiver may leave the

SDA in high state if it does not acknowledge the receipt of the data.

6.6

Data input

The device samples the data input on SDA on the rising edge of the SCL. The SDA signal

must be stable during the rising edge of SCL and the SDA signal must change only when

SCL is driven low.

6.7

Memory addressing

For the bus master to communicate to the slave device, the bus master must initiate a Start

condition and be followed by the slave device address. Accompanying the slave device

address, there is a Read/Write bit (R/W). The bit is set to 1 for Read and 0 for Write

operation.

If a match occurs on the slave device address, the corresponding device gives an

acknowledgement on the SDA during the 9th bit time. If there is no match, it deselects itself

from the bus by not responding to the transaction.

6.8

Operation modes

Table 9.

Operating modes

Mode

Byte

Programming sequence

Read

≥1

START, Device address, R/W

=0, Register Address to be read

RESTART, Device Address, R/W

=1, Data Read, STOP

If no STOP is issued, the Data Read can be continuously performed. If

the register address falls within the range that allows address auto-

increment, then register address auto-increments internally after every

byte of data being read. For register address that fails within a non-

incremental address range, the address is kept static throughout the

entire read operation. Refer to Table 8.: STMPE1801 register summary

table for the address ranges that are auto-increment and non-increment.

An example of such a non-increment address is FIFO.

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