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AN910 データシート(PDF) 45 Page - STMicroelectronics

部品番号 AN910
部品情報  ST7 AND ST9 PERFORMANCE BENCHMARKING
PDF  51 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN910 データシート(HTML) 45 Page - STMicroelectronics

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ST7 AND ST9 PERFORMANCE BENCHMARKING
8.9 16-BIT VALUE RIGHT SHIFT
8.10 BIT MANIPULATION
8.11 TIMER INTERRUPT
Algorithm
The 16-bit value right shift routine shifts a 16-bit value five places to the right.
Implementation
The operand to be shifted is 40h (hexadecimal value). It is taken into account as a 16-bit integer
and it is the 16-bit value which is shifted.
Features stressed
It is a test measuring the word (16-bit) and bit manipulation capability.
Algorithm
The Bit manipulation benchmark performs the set, the reset, and the test of 3 bits in a 128-bit
array.
Implementation
The memory where some bits will be set, reset, and tested, is initialized with the 'Ah' value
(hexadecimal value). It is composed of 8 words '0AAAAh', which represents a 16-byte memory
area, that is to say a 128-bit array.
The test consists in setting, resetting, and then testing the 10th bit of the array, then the 13th bit
of the array, and then the 123rd bit of the array. Setting a bit is setting it to 1. Resetting a bit is
resetting it to 0. And testing a bit is testing it and setting it to 1 if zero (with the zero flag Z also
set if zero).
Features stressed
This benchmark measures the computational capability and the efficiency in bit
manipulation.
Algorithm
The Timer interrupt benchmark is composed of two routines performing an input capture interrupt
and an input capture/output compare interrupt.
Implementation
The first routine is the body of an interrupt service routine handling a timer input capture.
The second is the body of an interrupt service routine handling a timer input capture or a output
compare; as interrupt vectors can be separate, this routine may be composed of two different
parts.
The routines include:
• the average instruction (that is an instruction lasting the average instruction cycle time)
which is interrupted and the interrupt entry process (they represent the interrupt latency)
• the body of a typical interrupt service routine including the following operations:
- stack two registers or change register bank (if not done by interrupt processing)
- read timer register
- call to a subroutine with input capture register content as input parameter or output
compare register content as output parameter
- return from subroutine
- unstack registers or restore register bank (if not done by interrupt processing)
- return from interrupt
It is true that each MCU has its specific own manner of handling interrupts. Reading the timer
register and using the input capture/output compare as a parameter for a function call has been
judged as a satisfying way to do so. Thus, it has been chosen as routine body.
Features stressed
This benchmark measures the interrupt processing performance.



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