PCB layout recommendations

AN3100

16/24

Doc ID 16606 Rev 2

6

PCB layout recommendations

Layout and PCB parameters play a very important role for DDR, especially when the system

runs at high frequencies like 333 MHz (667 MT/sec).

AN2674 PCB layout guidelines for SPEAr3xx provides recommendations for DDR signal

routing, track lengths and impedances. Please strictly follow these guidelines. This

application note also provides the required data to balance the length of the data/control

tracks going to the DDR chips.

PCB simulation is also strongly suggested to make sure that PCB does not introduce signal

reflection and to determine violations in the communication between MPMC and DDR. The

IBIS model of the DDR interface of SPEAr3xx is available to run these simulations. Refer to

AN3099 IBIS models for signal integrity simulation of SPEAr3xx applications.

The schematics and layouts of the SPEAr3xx evaluation boards are available and can be

used as reference design and starting point for your application design.