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RM0312 データシート(PDF) 128 Page - STMicroelectronics |
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RM0312 データシート(HTML) 128 Page - STMicroelectronics |
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128 / 275 page ![]() 16-bit general purpose timer (TIM2/TIM3) RM0312 128/275 DocID022352 Rev 3 17.5 TIMx capture/compare channels The timer I/O pins (TIMx_CHi) can be configured either for input capture or output compare functions. The choice made by configuring the CCiS channel selection bits in the capture/compare channel mode register (TIMx_CCMRi), where i is the channel number. Each Capture/Compare channel is built around a capture/compare register (including a shadow register), an input stage for capture (with digital filter, multiplexing and prescaler) and an output stage (with comparator and output control). Figure 48. Capture/compare channel 1 main circuit The capture/compare block is made of one preload register and one shadow register. Write and read always access the preload register. In capture mode, captures are actually done in the shadow register, which is copied into the preload register. In compare mode, the content of the preload register is copied into the shadow register which is compared to the counter. When the channel is configured in output mode (CCiS=0b00 in the TIMx_CCMRi register) where i is the channel number, the TIMx_CCRi register can be accessed without any restriction. When the channel is configured in input mode, the sequence for reading the TIMx_CCRi register is the same as for the counter. See Figure 49. When a capture occurs, the content of the counter is captured into the TIMx_CCRi shadow register. Then this value is loaded into the preload register, except during the read sequence, when the preload register is frozen. CC1E Capture/Compare shadow Register comparator Capture/Compare Preload Register Counter ic1ps CC1S[0] CC1S[1] capture input mode S R read CCR1H read CCR1L read_in_progress capture_transfer CC1S[0] CC1S[1] S R write CCR1H write CCR1L write_in_progress output mode UEV OC1PE (from time compare_transfer TIMx_CCMR1 OC1PE base unit) CNT>CCR1 CNT=CCR1 TIMx_EGR CC1G |
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