RM0312 datasheet(232/275 Pages) STMICROELECTRONICS

232 / 275 page

Universal synchronous/asynchronous receiver transmitter (USART)

RM0312

232/275

DocID022352 Rev 3

Figure 85. Start bit detection

Note:

If the sequence is not complete, the start bit detection aborts and the receiver returns to the

idle state (no flag is set), where it waits for a falling edge.

If only 2 out of the 3 bits are at 0 (sampling on the 3rd, 5th and 7th bits or sampling on the 8th,

9th and 10th bits), the start bit is validated but the NF noise flag bit is set.

The start bit is confirmed if the last 3 samples are at 0 (sampling on the 8th, 9th, and 10th

bits.

Character reception

During a USART reception, data shifts in least significant bit first through the USART_RX

pin. In this mode, the USART_DR register consists of a buffer (RDR) between the internal

bus and the received shift register (see Figure 2).

Procedure:

Program the M bit in USART_CR1 to define the word length.

Program the number of STOP bits in USART_CR3.

Select the desired baud rate by programming the baud rate registers in the following

order:

USART_BRR2

USART_BRR1

Set the REN bit USART_CR2. This enables the receiver which begins searching for a

start bit.

RX line

sampled values

Idle

Start bit

RX state

Real

sample

clock

Ideal

sample

clock

Conditions

to validate

the start bit

At least 2 bits

out of 3 at 0

At least 2 bits

out of 3 at 0

Falling edge

detection

11 12 13 14 15 16

1112131415 16

6/16

7/16

One-bit time

7/16

ai15471

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