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PIC18LC658-E/CL データシート(PDF) 39 Page - Microchip Technology |
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PIC18LC658-E/CL データシート(HTML) 39 Page - Microchip Technology |
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39 / 366 page ![]() 2000 Microchip Technology Inc. Advanced Information DS30475A-page 39 PIC18CXX8 TXB0D0 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB0DLC 658 858 0x00 xxxx 0u00 uuuu uuuu uuuu TXB0EIDL 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB0EIDH 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB0SIDL 658 858 xxx0 x0xx uuu0 u0uu uuuu uuuu TXB0SIDH 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB0CON 658 858 0000 0000 0000 0000 uuuu uuuu TXB1D7 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB1D6 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB1D5 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB1D4 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB1D3 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB1D2 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB1D1 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB1D0 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB1DLC 658 858 0x00 xxxx 0u00 uuuu uuuu uuuu TXB1EIDL 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB1EIDH 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB1SIDL 658 858 xxx0 x0xx uuu0 u0uu uuuu uuuu TXB1SIDH 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB1CON 658 858 0000 0000 0000 0000 uuuu uuuu TXB2D7 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB2D6 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB2D5 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB2D4 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB2D3 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB2D2 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB2D1 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB2D0 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB2DLC 658 858 0x00 xxxx 0u00 uuuu uuuu uuuu TXB2EIDL 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB2EIDH 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB2SIDL 658 858 xxx0 x0xx uuu0 u0uu uuuu uuuu TXB2SIDH 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXB2CON 658 858 0000 0000 0000 0000 uuuu uuuu RXM1EIDL 658 858 xxxx xxxx uuuu uuuu uuuu uuuu RXM1EIDH 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TABLE 3-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED) Register Applicable Devices Power-on Reset, Brown-out Reset MCLR Reset WDT Reset RESET Instruction Stack Resets Wake-up via WDT or Interrupt Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ’0’, q = value depends on condition Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up). 2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector (0008h or 0018h). 3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack. 4: See Table 3-2 for RESET value for specific condition. 5: Bit 6 of PORTA, LATA, and TRISA are enabled in ECIO and RCIO oscillator modes only. In all other oscillator modes, they are disabled and read ’0’. 6: The long write enable is only reset on a POR or MCLR. 7: Available on PIC18C858 only. |
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