PIC18LC658-ESLASHCL datasheet(44/366 Pages) MICROCHIP

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PIC18CXX8

DS30475A-page 44

Advanced Information

 2000 Microchip Technology Inc.

4.2.3

PUSH AND POP INSTRUCTIONS

Since the Top-of-Stack (TOS) is readable and writable,

the ability to push values onto the stack and pull values

off the stack without disturbing normal program execu-

tion is a desirable option. To push the current PC value

onto the stack, a PUSH instruction can be executed.

This will increment the stack pointer and load the cur-

rent PC value onto the stack. TOSU, TOSH and TOSL

can then be modified to place a return address on the

stack.

The POP instruction discards the current TOS by decre-

menting the stack pointer. The previous value pushed

onto the stack then becomes the TOS value.

4.2.4

STACK FULL/UNDERFLOW RESETS

These RESETs are enabled by programming the

STVREN configuration bit. When the STVREN bit is

disabled, a full or underflow condition will set the appro-

priate STKFUL or STKUNF bit, but not cause a device

RESET. When the STVREN bit is enabled, a full or

underflow will set the appropriate STKFUL or STKUNF

bit and then cause a device RESET. The STKFUL or

STKUNF bits are only cleared by the user software or

a POR.

4.3

Fast Register Stack

A “fast return” option is available for interrupts and

calls. A fast register stack is provided for the STATUS,

WREG and BSR registers and is only one layer in

depth. The stack is not readable or writable and is

loaded with the current value of the corresponding reg-

ister when the processor vectors for an interrupt. The

values in the fast register stack are then loaded back

into the working registers if the fast return instruc-

tion is used to return from the interrupt.

A low or high priority interrupt source will push values

into the stack registers. If both low and high priority

interrupts are enabled, the stack registers cannot be

used reliably for low priority interrupts. If a high priority

interrupt occurs while servicing a low priority interrupt,

the stack register values stored by the low priority inter-

rupt will be overwritten.

If high priority interrupts are not disabled during low pri-

ority interrupts, users must save the key registers in

software during a low priority interrupt.

If no interrupts are used, the fast register stack can be

used to restore the STATUS, WREG and BSR registers

at the end of a subroutine call. To use the fast register

stack for a subroutine call, a fast call instruction

must be executed.

Example 4-1 shows a source code example that uses

the fast register stack.

EXAMPLE 4-1:

FAST REGISTER STACK

CODE EXAMPLE

CALL SUB1, FAST

;STATUS, WREG, BSR

;SAVED IN FAST REGISTER

;STACK

•

SUB1

•

RETURN FAST

;RESTORE VALUES SAVED

;IN FAST REGISTER STACK

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