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PIC18LC658-E/CL データシート(PDF) 49 Page - Microchip Technology |
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PIC18LC658-E/CL データシート(HTML) 49 Page - Microchip Technology |
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49 / 366 page ![]() 2000 Microchip Technology Inc. Advanced Information DS30475A-page 49 PIC18CXX8 FIGURE 4-4: DATA MEMORY MAP FOR PIC18C658/858 Bank 0 Bank 1 Bank 14 Bank 15 Data Memory Map BSR<3:0> = 0000b = 0001b = 1110b = 1111b 060h 05Fh F60h FFFh 00h 5Fh 60h FFh Access Bank Bank 4 Bank 3 Bank 2 F5Fh F00h EFFh 3FFh 300h 2FFh 200h 1FFh 100h 0FFh 000h = 0110b = 0101b = 0011b = 0010b Access GPR’s FFh 00h FFh 00h FFh 00h FFh 00h FFh 00h FFh 00h GPR’s GPR’s GPR’s GPR’s Access SFR’s SFR’s Access Bank high Access Bank low Bank 5 GPR’s GPR’s Bank 6 to 4FFh 400h 5FFh 500h 600h Unused Read ’00h’ = 0100b (SFR’s) When a = 0, the BSR is ignored and the Access Bank is used. The first 96 bytes are Gen- eral Purpose RAM (from Bank 0). The next 160 bytes are Special Function Registers (from Bank 15). When a = 1, the BSR is used to specify the RAM location that the instruction uses. (GPR’s) |
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