RT9451 datasheet(31/37 Pages) RICHTEK

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RT9451

DS9451-00

September 2013

www.richtek.com

is a registered trademark of Richtek Technology Corporation.

threshold (6V typ.). When OVP occurs, the RT9451 stop

switching then enters high impedance mode.

Output Overload Protection (BSTOL)

The RT9451 provides an overload protection to prevent

the device and battery from damage when VIN is in

overload. Once the inductor current reaches cycle-by-cycle

current limit, the reverse blocking switch operates in linear

region to limit the output current while the MID voltage

remains in voltage regulation. If the overload condition lasts

for more than 30ms, the RT9451 determines the overload

fault condition and resets registers to the default settings.

Status Output (STAT pin)

The STAT pin is used to indicate operating conditions of

the RT9451 and is enabled by writing

“00” to the

EN_STAT [1:0] in the register of address 0x00. When

charging is in progress, the STAT pin is pulled low. In

other conditions, the STAT pin acts as a high impedance

output. The STAT pin can also be always pulled low or

high impedance by writing

“01” and “10” respectively.

Battery Protection

Battery Over-Voltage Protection in Charge Mode

(CHBATOVI)

The RT9451 monitors BATS voltage for output over-voltage

protection. In charge mode, if the BATS voltage rises above

VOVP_BAT x VOREG, for example, when the battery is

suddenly removed, the RT9450A stops charging and then

sets fault status bits and pull low INT pin. The condition is

released when BATS falls below (VOVP_BAT

− ΔVOVP_BAT) x

VOVP_BAT. The RT9451 then resumes charging process

with default settings and the fault is cleared.

Battery Over/Under-Voltage Protection in Boost

Mode (BSTBATOVI, BSTLOWVI)

In boost mode, if the BATS voltage rises above the BATS

maximum input voltage (4.75V typ.) or below BATS

minimum input voltage (2.5V typ. for operating, 3V typ.

for start), battery over/under-voltage protection is triggered.

The RT9451 stops switching, and then enters high

impedance mode.

Thermal Considerations

For continuous operation, do not exceed absolute

maximum junction temperature. The maximum power

dissipation depends on the thermal resistance of the IC

package, PCB layout, rate of surrounding airflow, and

difference between junction and ambient temperature. The

maximum power dissipation can be calculated by the

following formula :

PD(MAX) = (TJ(MAX)

− TA) / θJA

where TJ(MAX) is the maximum junction temperature, TA is

the ambient temperature, and

θJAis the junction to ambient

thermal resistance.

For recommended operating condition specifications, the

maximum junction temperature is 125

°C. The junction to

ambient thermal resistance,

θJA, is layout dependent. For

WQFN-32L 4x4 package, the thermal resistance,

θJA, is

27.8

°C/W on a standard JEDEC 51-7 four-layer thermal

test board. The maximum power dissipation at TA = 25

°C

can be calculated by the following formula :

PD(MAX) = (125

°C − 25°C) / (27.8°C/W) = 3.59W for

WQFN-32L 4x4 package

The maximum power dissipation depends on the operating

ambient temperature for fixed TJ(MAX) and thermal

resistance,

θJA. The derating curve in Figure 2 allows the

designer to see the effect of rising ambient temperature

on the maximum power dissipation.

Figure 2. Derating Curve of Maximum Power Dissipation

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

100

125

Ambient Temperature (°C)

Four-Layer PCB

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