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DP83902AVLC データシート(PDF) 35 Page - National Semiconductor (TI) |
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DP83902AVLC データシート(HTML) 35 Page - National Semiconductor (TI) |
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35 / 70 page  100 Internal Registers (Continued) 106 LOCAL DMA RECEIVE REGISTERS PAGE START AND STOP REGISTERS (PSTART PSTOP) The Page Start and Page Stop Registers program the start- ing and stopping address of the Receive Buffer Ring Since the ST-NIC uses fixed 256-byte buffers aligned on page boundaries only the upper 8 bits of the start and stop ad- dress are specified PSTART PSTOP Bit Assignment PSTOP PSTART 76543210 A15 A14 A13 A12 A11 A10 A9 A8 BOUNDARY (BNRY) REGISTER This register is used to prevent overflow of the Receive Buffer Ring Buffer management compares the contents of this register to the next buffer address when linking buffers together If the contents of this register match the next buff- er address the Local DMA operation is aborted 76543210 BNRY A15 A14 A13 A12 A11 A10 A9 A8 CURRENT PAGE REGISTER (CURR) This register is used internally by the Buffer Management Logic as a backup register for reception CURR contains the address of the first buffer to be used for a packet reception and is used to restore DMA pointers in the event of receive errors This register is initialized to the same value as PSTART and should not be written to again unless the con- troller is Reset 76543210 CURR A15 A14 A13 A12 A11 A10 A9 A8 CURRENT LOCAL DMA REGISTER 01 (CLDA0 1) These two registers can be accessed to determine the cur- rent local DMA address 76543210 CLDA1 A15 A14 A13 A12 A11 A10 A9 A8 76543210 CLDA0 A7 A6 A5 A4 A3 A2 A1 A0 107 REMOTE DMA REGISTERS REMOTE START ADDRESS REGISTERS (RSAR0 1) Remote DMA operations are programmed via the Remote Start Address (RSAR0 1) and Remote Byte Count (RBCR0 1) registers The Remote Start Address is used to point to the start of the block of data to be transferred and the Remote Byte Count is used to indicate the length of the block (in bytes) 76543210 RSAR1 A15 A14 A13 A12 A11 A10 A9 A8 76543210 RSAR0 A7 A6 A5 A4 A3 A2 A1 A0 REMOTE BYTE COUNT REGISTERS (RBCR0 1) 76543210 RBCR1 BC15 BC14 BC13 BC12 BC11 BC10 BC9 BC8 76543210 RBCR0 BC7 BC6 BC5 BC4 BC3 BC2 BC1 BC0 Note RSAR0 programs the start address bits A0–A7 RSAR1 programs the start address bits A8–A15 Address incremented by two for word transfers and by one for byte transfers Byte Count decremented by two for word transfers and by one for byte transfers RBCR0 programs LSB byte count RBCR1 programs MSB byte count CURRENT REMOTE DMA ADDRESS (CRDA0 CRDA1) The Current Remote DMA Registers contain the current ad- dress of the Remote DMA The bit assignment is shown below 76543210 CRDA1 A15 A14 A13 A12 A11 A10 A9 A8 76543210 CRDA0 A7 A6 A5 A4 A3 A2 A1 A0 108 PHYSICAL ADDRESS REGISTERS (PAR0 – PAR5) The physical address registers are used to compare the destination address of incoming packets for rejecting or ac- cepting packets Comparisons are performed on a byte- wide basis The bit assignment shown below relates the se- quence in PAR0 – PAR5 to the bit sequence of the received packet D7 D6 D5 D4 D3 D2 D1 D0 PAR0 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 PAR1 DA15 DA14 DA13 DA12 DA11 DA10 DA9 DA8 PAR2 DA23 DA22 DA21 DA20 DA19 DA18 DA17 DA16 PAR3 DA31 DA30 DA29 DA28 DA27 DA26 DA25 DA24 PAR4 DA39 DA38 DA37 DA36 DA35 DA34 DA33 DA32 PAR5 DA47 DA46 DA45 DA44 DA43 DA42 DA41 DA40 Destination Address Source PS DA0 DA1 DA2 DA3 DA46 DA47 SA0 Note PS e Preamble Synch DA0 e PhysicalMulticast Bit 109 MULTICAST ADDRESS REGISTERS (MAR0 – MAR7) The multicast address registers provide filtering of multicast addresses hashed by the CRC logic All destination ad- dresses are fed through the CRC logic and as the last bit of the destination address enters the CRC the 6 most signifi- 35 |
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