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PC87365 データシート(PDF) 43 Page - National Semiconductor (TI) |
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PC87365 データシート(HTML) 43 Page - National Semiconductor (TI) |
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43 / 215 page  2.0 Device Architecture and Configuration (Continued) 43 www.national.com 2.6 LED OPERATION AND STATES The device supports up to two LEDs, depending on Pin 25 and Pin 26 Function Select (bits 1-2 and bit 3) of the SIOCFA register. The polarity of both LEDs is determined by LED Polarity Control (bit 7) of the SIOCFD register. The device provides modes for software LED control when in power-on state. The device also provides modes for hardware LED control. This enables the LEDs to support features such as power and error indication. The LEDs may be operated in Software, Hardware1 or Hardware 2 modes. These modes are set by LED Mode Control (bits 2 and 3) of the SIOCFB register. Each LED can be set to On or Off or to blink at different rates by means of bits 0-2 (LED1) and bits 3-5 (LED2) of the SIOCFC register. When in power-on state (both VDD and VSB exist), the LEDs are software controlled. When in power-fail state (no VSB and no VDD), the LEDs are off. Note, however, that these rules are overridden when using the Hardware modes. Table 14 shows the effect of Hardware modes 1 and 2 on LED operation. Table 14. Effect of Hardware Modes 1 and 2 on LED Operation 2.7 POWER SUPPLY CONTROL AND LED CONFIGURATION A combination of two strap pins (Power Supply and LED Configuration 0 and 1, PSLDC0,1, pins 99 and 107, respectively) determines the configuration of the power supply control pins and LEDs. Both pins 99 and 107 have weak pull-downs and are sampled on VSB power-up reset. Table 15 describes how they affect the chip configuration. Table 15. PSLDC0,1 Configuration Options 2.8 REGISTER TYPE ABBREVIATIONS The following abbreviations are used to indicate the Register Type: q R/W = Read/Write. q R = Read from a specific address returns the value of a specific register. Write to the same address is to a different register. q W = Write. q RO = Read Only. q R/W1C = Read/Write 1 to Clear. Writing 1 to a bit clears it to 0. Writing 0 has no effect. Mode System State LED1 LED2 Hardware1 (SIOCFB, bits 3-2=01) VSB power-up reset Off 1 Hz blink, 50% duty cycle Power off (VSB,noVDD) Software controlled 1 Hz blink, 50% duty cycle Hardware 2 (SIOCFB, bits 3-2=10) ACPI mode and Sleep State 3 Software controlled Software controlled ACPI mode, Sleep State 5, bit 6 = 1 in SIOCFC register and Power Supply Control enabled Software controlled Software controlled ACPI mode, any other configuration Off Off Legacy mode and power off (no VDD) Off Off PSLDC0 (Pin 99) PSLDC1 (Pin 107) Power Supply Control LED2 0 0 Enabled (default) Not selected (default) 0 1 Disabled Selected 1 0 Disabled Not selected 1 1 Enabled Selected |
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