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ST7MC1 データシート(PDF) 273 Page - STMicroelectronics |
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ST7MC1 データシート(HTML) 273 Page - STMicroelectronics |
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273 / 308 page  ST7MC1/ST7MC2 273/308 MOTOR CONTROL CHARACTERISTICS (Cont’d) 12.12.2 Input Stage (comparator + sampling) Note: 1. The comparator accuracy is dependent of the environment. The offset value is given for a comparison done with all digital I/Os stable. Negative injection current on the I/Os close to the inputs may reduce the accuracy. In particular care must be taken to avoid switching on I/Os close to the inputs when the comparator is in use. This phenomenon is even more critical when a big external serial resistor is added on the inputs. 2. This filter is implemented to wait for comparator stabilization and avoid any wrong information during start-up. 3. This delay represents the number of clock cycles needed to generate an event as soon as the comparator output or MCO outputs change. Example: In tachogenerator mode, this means that capture is performed on the 4th clock cycle after comparator commu- tation., i.e. there is a variation of (1/fmtc) or (1 / fSCF) depending on the case. Symbol Parameter Conditions Min Typ Max Unit VIN Comparator input volt- age range VSSA - 0.1 VDD + 0.1 V Voffset Comparator offset error 5 40 1) mV Ioffset Input offset current 1 µA tpropag Comparator propagation delay 35 100 ns tstartup Start-up filter duration2) Time waited before sampling when com- parator is turned ON, i.e. CKE=1 or DAC=1 (with fPERIPH = 4MHz) 3 µs tsampling Digital sampling delay 3) Time needed to generate a capture in tachogenerator mode as soon as the MCI input toggles 4 / fmtc Time needed to capture MTIM in MZREG (BEMF) when sampling during PWM sig- nal OFF time as soon as MCO becomes ON 3 / fmtc (see Figure 150) Time needed to set/reset the HST bit when sampling during PWM signal OFF time as soon as MCO becomes ON (BEMF) 1 / fmtc (see Figure 150) Time needed to generate Z event (MTIM captured in MZREG) as soon as the com- parator toggles (when sampling at fSCF) 1 / fSCF + 3 / fmtc (see Figure 151) Time needed to generate D event (MTIM captured in MDREG) as soon as the com- parator toggles 1 / fSCF + 3 / fmtc (see Figure 151) Time needed to set/reset the HST bit when sampling during PWM signal ON time after a delay (DS>0) as soon as MCO becomes ON Delay programmed in DS bits (MCONF) +1 / fmtc (see Figure 152) Time needed to generate Z event (MTIM in MZREG) when sampling during PWM signal ON time after a delay (DS>0) as soon as MCO becomes ON Delay programmed in DS bits (MCONF) + 3 / fmtc (see Figure 152) Time needed to generate Z event (MTIM captured in MZREG) when sampling dur- ing PWM signal ON time at fSCF after a delay (DS>0) Delay programmed in DS bits (MCONF) + 1 / fSCF + 3 / fmtc (see Figure 152) |
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