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LED7708TR データシート(PDF) 30 Page - STMicroelectronics |
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LED7708TR データシート(HTML) 30 Page - STMicroelectronics |
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30 / 53 page ![]() Recommended operating conditions LED7708 30/53 Doc ID 022698 Rev 1 8.5.3 Internal registers access The LED7708 is capable of supporting different data formats to satisfy different application needs. The control registers are accessed one at a time by using 16-bit read/write operations, while the brightness registers can be loaded in sequence (16x16-bit) or in a single shot (1x256-bit). An additional data format (1x192-bit) allows data flow optimization when only 12 bits are used for brightness control. After the startup sequence, the 16x16-bit data format is set by default. Figure 8 details the signal timing for a write operation to the DEVCFGx registers. Table 12 summarizes the available operations: Figure 8. Timing diagram related to a DEVCFGx write operation Table 12. Internal register operations encoding DCLK rising edges with LE=1 Operation 1 Data latch (BRTxx) 2-3 Global latch (BRTxx) 4-5 Write CHSEL 6-7 Read CHSTA 8-9 Write DEVCFGx(*) 10-11 Read DEVCFGx (1) 1. The content of the shift register is loaded into DEVCFG0 or DEVCFG1 according to the DEST bit (the most significant bit, common to both registers). The data bits are shifted in starting from the most significant one (MSB first). 12-13 Write GSLAT |
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