TNETV1644ZDU6 datasheet(190/306 Pages) TI1

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MXI(A)

POR

RESET

RESETOUT

SYSCLKREFCLK

(PLLC1)

SYSCLK1

SYSCLK2

SYSCLK3

CLKOUT0

Bootand

ConfigurationPins

Config

Z+/LowGroup

(Zlonger-to-low)

Z+/HighGroup

(Zlonger-to-low)

ZGroup

Power

Supplies

Ramping

PowerSuppliesStable

Hi-Z

ClockSourceStable

DDR2ZGroup

DDR2LowGroup

DDR2HighGroup

DrivenorHi-Z

Z/HighGroup

(Z-to-high)

Z/LowGroup

(Z-to-low)

Z+/InvalidGroup

(Zlonger-to-Invalid)

Hi-Z

Invalid

TMS320DM6437

Digital Media Processor

SPRS345D – NOVEMBER 2006 – REVISED JUNE 2008

www.ti.com

Power supplies and MXI must be stable before the start of tW(RESET)..

Pin reset behavior depends on which peripheral defaults to controlling the multiplexed pin. For more details on what

pin group (e.g., Z Group, Z/Low Group, Z/High Group, etc.) each pin belongs to, see Section 6.5.8, Pin Behaviors at

Reset.

Figure 6-7. Power-Up Timing(B)

Peripheral Information and Electrical Specifications

190

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