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A5974D データシート(PDF) 9 Page - STMicroelectronics |
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A5974D データシート(HTML) 9 Page - STMicroelectronics |
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9 / 46 page ![]() DocID018774 Rev 2 9/46 A5974D Functional description 46 5 Functional description The main internal blocks are shown in the device block diagram in Figure 3. They are: A voltage regulator supplying the internal circuitry. From this regulator, a 3.3 V reference voltage is externally available. A voltage monitor circuit which checks the input and the internal voltages. A fully integrated sawtooth oscillator with a frequency of 250 kHz 15%, including also the voltage feed-forward function and an input/output synchronization pin. Two embedded current limitation circuits which control the current that flows through the power switch. The pulse-by-pulse current limit forces the power switch OFF cycle- by-cycle if the current reaches an internal threshold, while the frequency shifter reduces the switching frequency in order to significantly reduce the duty cycle. A transconductance error amplifier. A pulse width modulator (PWM) comparator and the relative logic circuitry necessary to drive the internal power. A high-side driver for the internal P-MOS switch. An inhibit block for standby operation. A circuit to implement the thermal protection function. Figure 3. Block diagram 5.1 Power supply and voltage reference The internal regulator circuit (shown in Figure 4) consists of a start-up circuit, an internal voltage pre-regulator, the bandgap voltage reference and the bias block that provides current to all the blocks. The starter supplies the start-up currents to the entire device when the input voltage goes high and the device is enabled (inhibit pin connected to ground). The pre-regulator block supplies the Bandgap cell with a pre-regulated voltage VREG that has a very low supply voltage noise sensitivity. |
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