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STM32L471RG データシート(PDF) 183 Page - STMicroelectronics |
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STM32L471RG データシート(HTML) 183 Page - STMicroelectronics |
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183 / 218 page  DocID027226 Rev 1 183/218 STM32L471xx Electrical characteristics 199 6.3.27 FSMC characteristics Unless otherwise specified, the parameters given in Table 88 to Table 101 for the FMC interface are derived from tests performed under the ambient temperature, fHCLK frequency and VDD supply voltage conditions summarized in Table 22, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 11 • Capacitive load C = 30 pF • Measurement points are done at CMOS levels: 0.5VDD Refer to Section 6.3.14: I/O port characteristics for more details on the input/output characteristics. Asynchronous waveforms and timings Figure 36 through Figure 39 represent asynchronous waveforms and Table 88 through Table 95 provide the corresponding timings. The results shown in these tables are obtained with the following FMC configuration: • AddressSetupTime = 0x1 • AddressHoldTime = 0x1 • DataSetupTime = 0x1 (except for asynchronous NWAIT mode, DataSetupTime = 0x5) • BusTurnAroundDuration = 0x0 In all timing tables, the THCLK is the HCLK clock period. |
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