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AD9681 データシート(PDF) 5 Page - Analog Devices

部品番号 AD9681
部品情報  1.8 V Analog-to-Digital Converter
PDF  41 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD9681 データシート(HTML) 5 Page - Analog Devices

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AD9681
Data Sheet
Rev. C | Page 4 of 40
SPECIFICATIONS
DC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = −1.0 dBFS, unless otherwise noted.
Table 1.
Parameter1
Temp
Min
Typ
Max
Unit
RESOLUTION
14
Bits
ACCURACY
No Missing Codes
Full
Guaranteed
Offset Error
Full
−0.23
+0.21
+0.62
% FSR
Offset Matching
Full
0
0.24
0.7
% FSR
Gain Error
Full
−8.0
−3.1
+1.7
% FSR
Gain Matching
Full
0
1.8
6.0
% FSR
Differential Nonlinearity (DNL)
Full
−0.92
±0.8
+1.75
LSB
Integral Nonlinearity (INL)
Full
−4.0
±1.2
+4.0
LSB
TEMPERATURE DRIFT
Offset Error
Full
−4
ppm/°C
Gain Error
Full
38
ppm/°C
INTERNAL VOLTAGE REFERENCE
Output Voltage (1 V Mode)
Full
0.98
1.0
1.02
V
Load Regulation at 1.0 mA (VREF = 1 V)
25°C
3
mV
Input Resistance
Full
7.5
kΩ
INPUT-REFERRED NOISE
VREF = 1.0 V
25°C
0.99
LSB rms
ANALOG INPUTS
Differential Input Voltage (VREF = 1 V)
Full
2
V p-p
Common-Mode Voltage
Full
0.5
0.9
1.3
V
Differential Input Resistance
Full
5.2
kΩ
Differential Input Capacitance
Full
3.5
pF
POWER SUPPLY
AVDD
Full
1.7
1.8
1.9
V
DRVDD
Full
1.7
1.8
1.9
V
IAVDD
Full
368
423
mA
IDRVDD (ANSI-644 Mode)
Full
120
126
mA
IDRVDD (Reduced Range Mode)
25°C
90
mA
TOTAL POWER CONSUMPTION
Total Power Dissipation (Eight Channels, Including Output Drivers
ANSI-644 Mode)
Full
879
988
mW
Total Power Dissipation (Eight Channels, Including Output Drivers
Reduced Range Mode)
25°C
825
mW
Power-Down Dissipation
25°C
2
mW
Standby Dissipation2
25°C
485
mW
1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for definitions and for information about how these tests were completed.
2 Controlled via the SPI.



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