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GPR25L12805F データシート(PDF) 45 Page - Generalplus Technology Inc. |
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GPR25L12805F データシート(HTML) 45 Page - Generalplus Technology Inc. |
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45 / 58 page ![]() GPR25L12805F © Generalplus Technology Inc. Proprietary & Confidential 45 Nov. 23, 2017 Version: 1.1 Table 12. Parameter Table (1): Flash Parameter Tables Description Comment Add (h) (Byte) DW Add (Bit) Data (h/b) note1 Data (h) Vcc Supply Maximum Voltage 2000h=2.000V 2700h=2.700V 3600h=3.600V 61h:60h 07:00 15:08 00h 36h 00h 36h Vcc Supply Minimum Voltage 1650h=1.650V 2250h=2.250V 2350h=2.350V 2700h=2.700V 63h:62h 23:16 31:24 00h 27h 00h 27h H/W Reset# pin 0=not support 1=support 65h:64h 00 1b F99Dh H/W Hold# pin 0=not support 1=support 01 0b Deep Power Down Mode 0=not support 1=support 02 1b S/W Reset 0=not support 1=support 03 1b S/W Reset Opcode Reset Enable (66h) should be issued before Reset Opcode 11:04 1001 1001b (99h) Program Suspend/Resume 0=not support 1=support 12 1b Erase Suspend/Resume 0=not support 1=support 13 1b Unused 14 1b Wrap-Around Read mode 0=not support 1=support 15 1b Wrap-Around Read mode Opcode 66h 23:16 C0h C0h Wrap-Around Read data length 08h:support 8B wrap-around read 16h:8B&16B 32h:8B&16B&32B 64h:8B&16B&32B&64B 67h 31:24 64h 64h Individual block lock 0=not support 1=support 6Bh:68h 00 1b CB85h Individual block lock bit (Volatile/Nonvolatile) 0=Volatile 1=Nonvolatile 01 0b Individual block lock Opcode 09:02 1110 0001b (E1h) Individual block lock Volatile protect bit default protect status 0=protect 1=unprotect 10 0b Secured OTP 0=not support 1=support 11 1b Read Lock 0=not support 1=support 12 0b Permanent Lock 0=not support 1=support 13 0b Unused 15:14 11b Unused 31:16 FFh FFh Unused 6Fh:6Ch [31:00] FFh FFh Note 1: h/b is hexadecimal or binary. Note 2: (x-y-z) means I/O mode nomenclature used to indicate the number of active pins used for the opcode (x), address (y), and data (z). At the present time, the only valid Read SFDP instruction modes are: (1-1-1), (2-2-2), and (4-4-4) Note 3: Wait States is required dummy clock cycles after the address bits or optional mode bits. Note 4: Mode Bits is optional control bits that follow the address bits. These bits are driven by the system controller if they are specified. (eg,read performance enhance toggling bits) Note 5: 4KB=2^0Ch,32KB=2^0Fh,64KB=2^10h Note 6: All unused and undefined area data is blank FFh. |
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