GD25LE256DWJS datasheet(25/83 Pages) GIGADEVICE

25 / 83 page

1.8V Uniform Sector

Dual and Quad Serial Flash

GD25LE256D

7.8.

Read Data Bytes (READ) (03H)

The Read Data Bytes (READ) command is followed by a 3-byte address (A23-A0) or a 4-byte address (A31-A0), and

each bit is latched-in on the rising edge of SCLK. Then the memory content, at that address, is shifted out on SO, and each

bit is shifted out, at a Max frequency fR, on the falling edge of SCLK. The first byte addressed can be at any location. The

address is automatically incremented to the next higher address after each byte of data is shifted out. The default read

mode is 3-byte address mode, and the lower 128Mbit can be read with a single Read Data Byte (03H) command. By entering

4-byte address mode, or to set EN4B (S11) bit to 1, the higher 128Mbit can be read with a single Read Data Byte (03H)

command. Any Read Data Bytes (03H) command, while an Erase, Program or Write cycle is in progress, is rejected without

having any effects on the cycle that is in progress.

Figure9. Read Data Bytes Sequence Diagram

Note: The device default is in 24-bit address mode. For 4-byte mode, the address length becomes 32-bit.

Command

03H

CS#

SCLK

High-Z

9 10

28 29 30 31 32

MSB

34 35 36 37

23 22 21

38 39

24-bit address

MSB

Data Out1

Data Out2

GD25LE256DWJS データシート(PDF) 25 Page - GigaDevice Semiconductor (Beijing) Inc.