AM652X datasheet(249/277 Pages) TI1

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249

AM6548, AM6528, AM6546

AM6526, AM6527

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SPRSP08I – NOVEMBER 2017 – REVISED DECEMBER 2019

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Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527

Detailed Description

The WKUP_I2C0 and MCU_I2C0 controllers have dedicated I2C compliant open drain buffers, and

support fast mode (up to 400 Kbps).The I2C0, I2C1, I2C2, and I2C3 controllers are multiplexed with

standard LVCMOS I/O and connected to emulate open drain.The I2C emulation is achieved by configuring

the LVCMOS buffers to output Hi-Z instead of driving high when transmitting logic 1.

For more information, see Inter-Integrated Circuit (I2C) Interface section in the device TRM.

6.4.5.16 MCAN

The Controller Area Network (CAN) is a serial communications protocol which efficiently supports

distributed real-time control. CAN has high immunity to electrical interference. In a CAN network, many

short messages are broadcast to the entire network, which provides for data consistency in every node of

the system.

The MCAN module supports both classic CAN and CAN FD (CAN with Flexible Data-Rate) specifications.

CAN FD feature allows high throughput and increased payload per data frame. The classic CAN and CAN

FD devices can coexist on the same network without any conflict.

The device supports two MCAN modules - MCU_MCAN0 and MCU_MCAN1. They connect to the

physical layer of the CAN network through external (for the device) transceivers. Each MCAN module

supports flexible bit rates greater than 1 Mbps and is compliant to ISO 11898-1:2015.

For more information, see Modular Controller Area Network (MCAN) section in the device TRM.

6.4.5.17 MCASP

The MCASP functions as a general-purpose audio serial port are optimized to the requirements of various

audio applications. The MCASP module can operate in both transmit and receive modes. The MCASP is

useful for time-division multiplexed (TDM) stream, Inter-IC Sound (I2S) protocols reception and

transmission as well as for an intercomponent digital audio interface transmission (DIT). The MCASP has

the flexibility to gluelessly connect to a Sony/Philips digital interface (S/PDIF) transmit physical layer

component.

Although intercomponent digital audio interface reception (DIR) mode (this is, S/PDIF stream receiving) is

not natively supported by the MCASP module, a specific TDM mode implementation for the MCASP

receivers allows an easy connection to external DIR components (for example, S/PDIF to I2S format

converters).

For more information, see Multichannel Audio Serial Port (MCASP) section in the device TRM.

6.4.5.18 MCRC

VBUSM CRC controller is a module which is used to perform CRC (Cyclic Redundancy Check) to verify

the integrity of a memory system. A signature representing the contents of the memory is obtained when

the contents of the memory are read into MCRC Controller. The responsibility of MCRC controller is to

calculate the signature for a set of data and then compare the calculated signature value against a

predetermined good signature value. MCRC controller provides four channels to perform CRC calculation

on multiple memories in parallel and can be used on any memory system. Channel 1 can also be put into

data trace mode, where MCRC controller compresses each data being read through CPU read data bus.

For more information, see Memory Cyclic Redundancy Check (MCRC) Controller section in the device

TRM.

6.4.5.19 MCSPI

The MCSPI module is a multichannel transmit/receive, master/slave synchronous serial bus.

There are total of eight MCSPI modules in the device.

MCSPI3 and MCSPI4 include internal connectivity to MCSPI modules in the MCU domain, as follows:

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