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STPMIC1 データシート(PDF) 79 Page - STMicroelectronics

部品番号 STPMIC1
部品情報  Highly integrated power management IC for micro processor units
PDF  140 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
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STPMIC1 データシート(HTML) 79 Page - STMicroelectronics

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6.3.5
LDO5/6 pull-down control register (LDO56_VREF_PD_CR)
Table 29. LDO56_VREF_PD_CR
7
6
5
4
3
2
1
0
reserved
BST_PD
REFDDR_PD[1:0]
LDO6_PD[1:0]
LDO5_PD[1:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address: 0x14
Type: read/write register
Default: 0x00
Description: LDO5 and LDO6 pull-down control register. This register is initialized to default values upon entering
to CHECK&LOAD state.
[7]
Reserved
[6]
BST_PD: Boost pull-down activation (reverse logic)
0: PD active when BST_ON = 0
1: PD inactive when BST_ON = 0
[5:4]
REFDDR_PD[1:0]:
00: PD active only when REFDDR disabled
01: PD forced inactive
10: PD forced inactive
11: PD forced active
[3:2]
LDO6_PD[1:0]:
00: PD active only when LDO6 disabled
01: PD forced inactive
10: PD forced inactive
11: PD forced active
[1:0]
LDO5_PD[1:0]:
00: PD active only when LDO5 disabled
01: PD forced inactive
10: PD forced inactive
11: PD forced active
STPMIC1
Control registers
DS12792 - Rev 7
page 79/140



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