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STPMIC1 データシート(PDF) 93 Page - STMicroelectronics |
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STPMIC1 データシート(HTML) 93 Page - STMicroelectronics |
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93 / 140 page  6.4.6 BUCKx ALTERNATE mode control registers (BUCKx_ALT_CR)(x=1..4) Table 43. BUCKx_ALT_CR 7 6 5 4 3 2 1 0 VOUT[5:0] PREG_MODE ENA R/W R/W R/W R/W R/W R/W R/W R/W Address: 0x30 to 0x33 Type: read/write register Default: 0bXXXXXX00 where X depends on the value programmed in NVM Description: BUCKx ALTERNATE mode control registers. The register is set to a default value in CHECK&LOAD. User can write to these registers to control enable, regulation mode and voltage settings of BUCKx that is applied to ALTERNATE mode. [7:2] VOUT[5:0]: refer to Table 10. BUCK output settings [1] PREG_MODE: Force high power - low power mode of buck 0: high power mode (HP) 1: low power mode (LP) [0] ENA: buck enable bit 0: buck is disabled 1: buck is enabled STPMIC1 Power supplies control registers DS12792 - Rev 7 page 93/140 |
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