MPC885ZP80 datasheet(85/87 Pages) NXP

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MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7

Freescale Semiconductor

Document Revision History

17 Document Revision History

Table 40 lists significant changes between revisions of this hardware specification.

Table 40. Document Revision History

Revision

Number

Date

Changes

07/2010

In Table 9, “Bus Operation Timings,” changed the following:

• Updated TRLX condition value for B22a/b/c to “TRLX = [0 or 1]”

• Removed TRLX condition for B23

• Updated condition and equation for B30 to “Invalid GPCM read/write access

(MIN = 0.25

× B1 – 2.00)”

• Updated note 8 to “The timing B30 refers to CS when ACS = 00 and to CS and WE(0:3) when

CSNT = 0.”

05/2010

Added minimum load for CLKOUT in Section 10, “Bus Signal Timing.”

03/2009

Updated formatting of Table 12 , “PCMCIA Port Timing,” Table 13, “Debug Port Timing,” Table 14,

“Reset Timing,” and Table 15, “JTAG Timing.”

08/2007

• On page 1, updated first paragraph and added a second paragraph.

• After Table 2, inserted a new figure showing the undershoot/overshoot voltage (Figure 3) and

renumbered the rest of the figures.

•In Table 9, for reset timings B29f and B29g added footnote indicating that the formula only applies

to bus operation up to 50 MHz.

•In Figure 6, changed all reference voltage measurement points from 0.2 and 0.8 V to 50% level.

•In Table 18, changed num 46 description to read, “TA assertion to rising edge ...”

•In Figure 49, changed TA to reflect the rising edge of the clock.

3.0

7/22/2004

• Added sentence to Spec B1A about EXTCLK and CLKOUT being in Alignment for Integer Values

• Added a footnote to Spec 41 specifying that EDM = 1

• Added RMII1_EN under M1II_EN in Table 36 Pin Assignments

• Added a tablefootnote to Table 6 DC Electrical Specifications about meeting the VIL Max of the

I2C Standard

• Put the new part numbers in the Ordering Information Section

2.0

12/2003

• Changed the maximum operating frequency to 133 MHz.

• Put in the orderable part numbers that are orderable.

• Put the timing in the 80 MHz column.

• Rounded the timings to hundredths in the 80 MHz column.

• Put the pin numbers in footnotes by the maximum currents in Table 6.

• Changed 22 and 41 in the Timing.

• Put in the Thermal numbers.

1.0

9/2003

• Added the DSP information in the Features list

• Fixed table formatting.

• Nontechnical edits.

• Released to the external web.

0.9

8/2003

Changed the USB description to full-/low-speed compatible.

0.8

8/2003

Added the Reference to USB 2.0 to the Features list and removed 1.1 from USB on the block

diagrams.

0.7

7/2003

Added the RxClav and TxClav signals to PC15.

0.6

6/2003

Changed the pin descriptions per the June 22 spec.

0.5

5/2003

Changed some more typos, put in the phsel and phreq pins. Corrected the USB timing.

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