STM32WL55JC datasheet(89/147 Pages) STMICROELECTRONICS

部品番号	STM32WL55JC

部品情報	Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0 LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM

PDF	147 Pages

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メーカー	STMICROELECTRONICS [STMicroelectronics]

ホームページ	http://www.st.com

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Table 44. Current consumption in LPSleep mode on CPU1 and CPU2,

Flash memory in power-down

Symbol

Parameter

Conditions

Typ

Unit

-fHCLK (MHz)

25 °C

IDD(LPSleep)

Supply current in

LPSleep mode

fHCLK = fMS

All peripherals disabled

259.5

µA

136.0

0.4

21.5

0.1

12.5

Table 45. Current consumption in Stop 2 mode

Symbol

Parameter

Conditions

Typ

Max(1)

Unit

VDD (V)

0 °C

25 °C

55 °C

85 °C

105 °C

0 °C

25 °C

85 °C

105 °C

IDD

(Stop 2)

Supply current in Stop 2 mode

RTC disabled

1.8

0.545

0.830

2.45

8.45

13.5

1.20

2.20

24.0

66.0

µA

2.4

0.525

0.850

2.60

8.80

14.0

3.0

0.605

0.885

2.80

9.25

14.5

1.10

2.60

26.0

69.0

3.6

0.630

0.935

3.10

9.75

15.5

1.40

2.80

26.0

71.0

IDD

(Stop 2 with

RTC)

Supply current in Stop 2 mode

RTC enabled, clocked by LSI(2)

1.8

0.650

0.880

2.55

8.25

13.5

1.30

2.30

24.0

66.0

2.4

0.630

0.945

2.70

8.85

14.0

3.0

0.715

1.00

2.90

9.70

15.0

1.40

2.80

26.0

69.0

3.6

0.750

1.10

3.15

10.5

15.5

1.50

3.00

26.0

71.0

1. Guaranteed based on test during characterization, unless otherwise specified.

2. LSI using LSIPRE = 1 configuration.

STM32WL55JC データシート(PDF) 89 Page - STMicroelectronics

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