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STM32WL55JC データシート(PDF) 21 Page - STMicroelectronics

部品番号 STM32WL55JC
部品情報  Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0 LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
PDF  147 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32WL55JC データシート(HTML) 21 Page - STMicroelectronics

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DS13293 Rev 2
21/147
STM32WL55/54xx
Functional overview
50
For this, the REG PA must be supplied directly from VDD on VDDSMPS pin, as shown in the
figure below.
The output power range is programmable in 32 steps of ~ 1 dB. The power amplifier
ramping timing is also programmable.This allows adaptation to meet radio regulation
requirements.
Figure 3. High output power PA
The table below gives the maximum transmit output power versus the VDDPA supply level.
Transmitter low output power
The transmit low output power up to + 15 dBm on full VDD range (1.8 to 3.6 V), is supported
through the RFO_LP RF pin. For this, the REG PA must be supplied from the regulated
VFBSMPS supply at 1.55 V, as shown in the figure below.
The output power range is programmable in 32 steps of ~1 dB. The power amplifier ramping
timing is also programmable.This allows adaptation to meet radio regulation requirements.
Table 4. Sub-GHz radio transmit high output power
VDDPA supply (V)
Transmit output power (dBm)
3.3
+ 22
2.7
+ 20
2.4
+ 19
1.8
+ 16
MSv62616V2
VLXSMPS
VFBSMPS (1.55V)
VDDPA
VR_PA (up to 3.1V)
RFO_HP
LDO/SMPS
REG
PA
HP PA
VLXSMPS
VFBSMPS (1.55V)
VDDPA
VR_PA (up to 3.1V)
RFO_HP
LDO/SMPS
REG
PA
HP PA
VDD
VDD
VDD
VDD
VDDSMPS (1.8 to 3.6V)
VDDSMPS (1.8 to 3.6V)
LDO mode
SMPS mode
Note: Use of the SMPS is optional. When SMPS is not used, the BOM can be reduced by removing the coil
between VLXSMPS and VFBSMPS pins.



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